An 11-bit two-step column-shared ADC based on Flash/SS architecture for CMOS image sensor. - Qiang Zhao 007; Jitao Xu 005; Chunhui Fan; Ziming Wang; Ruitong Hu; Xin Li 099; Zhigang Li; Licai Hao; Chunyu Peng; Zhiting Lin; Xiulong Wu (Microelectron. J., 2024)

A residual pulse broadening interpolation quantization column-level ADC architecture for CMOS image sensors. - Qiang Zhao 007; Ziming Wang; Chunhui Fan; Bin Qiang; Jitao Xu 005; Xin Li 099; Zhigang Li; Licai Hao; Chunyu Peng; Zhiting Lin; Xiulong Wu (Microelectron. J., 2025)