Functional Verification of Arithmetic Circuits: Survey of Formal Methods. - Maciej J. Ciesielski; Atif Yasin; Jiteshri Dasari (DDECS, 2022)

Formal Verification of Restoring Dividers made Fast and Simple. - Jiteshri Dasari; Maciej J. Ciesielski (DAC, 2023)

Efficient Formal Verification and Debugging of Arithmetic Divider Circuits. - Jiteshri Dasari; Maciej J. Ciesielski (ICCAD, 2023)

Combining Formal Verification and Testing for Debugging of Arithmetic Circuits. - Jiteshri Dasari; Maciej J. Ciesielski (DATE, 2024)

Linear Algebra Approach to Verification of Modular $(2^{n}-1)$ Multipliers. - Jiteshri Dasari; Cunxi Yu; Maciej J. Ciesielski (VLSI-SoC, 2024)