Clock gating for power optimization in ASIC design cycle theory & practice. - Sukumar Jairam; Madhusudan Rao; Jithendra Srinivas; Parimala Vishwanath; H. Udayakumar; Jagdish C. Rao (ISLPED, 2008)

Clock gating effectiveness metrics: Applications to power optimization. - Jithendra Srinivas; Madhusudan Rao; Sukumar Jairam; H. Udayakumar; Jagdish C. Rao (ISQED, 2009)

Clock gating approaches by IOEX graphs and cluster efficiency plots. - Jithendra Srinivas; Sukumar Jairam (DATE, 2010)

Compiler Directed Data Locality Optimization for Multicore Architectures. - Wei Ding 008; Jithendra Srinivas; Mahmut T. Kandemir; Mustafa Karaköy (PACT, 2011)

Locality-aware mapping and scheduling for multicores. - Wei Ding 008; Yuanrui Zhang; Mahmut T. Kandemir; Jithendra Srinivas; Praveen Yedlapalli (CGO, 2013)

Reactive tiling. - Jithendra Srinivas; Wei Ding 008; Mahmut T. Kandemir (CGO, 2015)