High mobility germanium-on-insulator p-channel FinFETs. - Huan Liu; Genquan Han; Jiuren Zhou; Yan Liu; Yue Hao 001 (Sci. China Inf. Sci., 2021)

First Demonstration of Fully CMOS-compatible Non-volatile Programmable Photonic Switch Enabled by Ferroelectric-SOI Waveguide for Next Generation Photonic Integrated Circuit. - Yue Chen; Gong Zhang 009; Jiuren Zhou; Zijie Zheng; Leming Jiao; Haibo Wang; Zuopu Zhou; Annie Kumar; Jishen Zhang; Yuxuan Wang; Qiwen Kong; Chen Sun 010; et al. (VLSI Technology and Circuits, 2022)

Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast Speed, and Long Retention. - Zuopu Zhou; Leming Jiao; Jiuren Zhou; Zijie Zheng; Yue Chen; Kaizhen Han; Yuye Kang; Xiao Gong (VLSI Technology and Circuits, 2022)

SSPE: A Device-edge SNN Inference Artificial Intelligence Processor in Supporting Smart Computing. - Zhou Wang 005; Haochen Du; Jiuren Zhou; Yanqing Xu; Xiaonan Tang; Tianchun Ye 001; Shaojun Wei; Shushan Qiao; Shouyi Yin (APCCAS, 2024)

GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications. - Zhou Wang 005; Haochen Du; Jiuren Zhou; Yang Zhou; Xiaonan Tang; Tianchun Ye 001; Shaojun Wei; Shushan Qiao; Shouyi Yin (APCCAS, 2024)

Accurate Charge-Domain Bootstrapped Computing-in-Memory SRAM Design with Wide Programmable Output Voltage Range. - Fuyi Li; Yu Xia; Shuai Xiao; Pengcheng Yang; Xingyu Zhu; Bo Li; Jiuren Zhou; Genquan Han; Wei Mao 002 (SOCC, 2024)

Enhanced fatigue resistance of ferroelectric Al0.65Sc0.35N deposited by physical vapor deposition. - Yang Li; Danyang Yao; Yan Liu; Zhi Jiang; Ruiqing Wang; Xu Ran; Jiuren Zhou; Qikun Wang; Guoqiang Wu; Genquan Han (Sci. China Inf. Sci., 2024)

Double-gated ferroelectric-gate field-effect-transistor for multi-bit content-addressable memories. - Zhe Wang; Yan Liu; Jiuren Zhou; Genquan Han (Microelectron. J., 2024)

STPE: An Energy-Efficient Edge-Device Transformer Inference Processor with Multi-Mode Data-Compression Scheme. - Zhou Wang 005; Haochen Du; Vivek Mohan; Jiuren Zhou; Zhou Shu; Yanqing Xu; Baoyi Han; Xiaonan Tang; Shushan Qiao; Shouyi Yin; Anil A. Bharath; Emmanuel M. Drakakis (ISCAS, 2025)

GPE: A High-Performance Edge GNN Inference Processor with Multi-Parallelism Format-Variation Mechanism. - Zhou Wang 005; Haochen Du; Jiuren Zhou; Zhou Shu; Yanqing Xu; Vivek Mohan; Baoyi Han; Xiaonan Tang; Shushan Qiao; Shouyi Yin; Anil A. Bharath; Emmanuel M. Drakakis (ISCAS, 2025)