Advanced Synchronous Scan Test Methodology for Multi Clock Domain ASICs. - Josef Schmid; Joachim Knäblein (VTS, 1999)

Formale Spezifikation und Verifikation abstrakter Beschreibungen von Telekommunikationsprotokollen. - Axel Schneider; Thomas Bluhm; Tobias Renner; Ulrich Heinkel; Joachim Knäblein; Reynaldo Zavala (MBMV, 2006)

Formal Verification of Abstract System and Protocol Specifications. - Axel Schneider; Thomas Bluhm; Tobias Renner; Ulrich Heinkel; Joachim Knäblein; Reynaldo Zavala (SEW, 2006)

Implementation of Parallel LFSR-based Applications on an Adaptive DSP featuring a Pipelined Configurable Gate Array. - Claudio Mucci; Luca Vanzolini; Ilario Mirimin; Daniele Gazzola; Antonio Deledda; Sebastian Goller; Joachim Knäblein; Axel Schneider; Luca Ciccarelli; Fabio Campi (DATE, 2008)

Testfallgenerierung für SystemC-Designs mit abstrakten Modellbeschreibungen. - Jens Gladigau; Christian Haubelt; Martin Streubühr; Jürgen Teich; Axel Schneider; Joachim Knäblein; Michael Lindig (MBMV, 2009)

An in-band reconfigurable network node based on a heterogeneous platform. - Erik Markert; Enrico Billich; Claudia Tischendorf; Uwe Proß; Thilo Leibelt; Ulrich Heinkel; Joachim Knäblein; Axel Schneider (DASIP, 2010)

Demonstration of an in-band reconfiguration data distribution and network node reconfiguration. - Uwe Proß; Sebastian Goller; Erik Markert; Michael Jüttner; Jan Langer; Ulrich Heinkel; Joachim Knäblein; Axel Schneider (DATE, 2010)

Technology Independent, Embedded Logic Cores Utilizing synthesizable embedded FPGA-cores for ASIC design validation. - Joachim Knäblein; Claudia Tischendorf; Erik Markert; Ulrich Heinkel (ReCoSoC, 2010)

MORPHEUS: A heterogeneous dynamically reconfigurable platform for designing highly complex embedded systems. - Nikolaos S. Voros; Michael Hübner 001; Jürgen Becker 001; Matthias Kühnle; Florian Thoma; Arnaud Grasset; Paul Brelet; Philippe Bonnot 001; Fabio Campi; Eberhard Schüler; Henning Sahlbach; Sean Whitty; et al. (ACM Trans. Embed. Comput. Syst., 2013)