QRS detection for pacemakers in a noisy environment using a time lagged artificial neural network. - Joachim Neves Rodrigues; Viktor Öwall; Leif Sörnmo (ISCAS (3), 2001)

A wavelet based R-wave detector for cardiac pacemakers in 0.35 CMOS technology. - Joachim Neves Rodrigues; Viktor Öwall; Leif Sörnmo (ISCAS (4), 2004)

A dual-mode wavelet based R-wave detector using single-Vt for leakage reduction [cardiac pacemaker applications]. - Joachim Neves Rodrigues; Thomas Olsson 001; Leif Sörnmo; Viktor Öwall (ISCAS (2), 2005)

Teaching Digital ASIC Design to Students with Heterogeneous Previous Knowledge. - Hugo Hedberg; Joachim Neves Rodrigues; Fredrik Kristensen; Henrik Svensson; Matthias Kamuf; Viktor Öwall (MSE, 2005)

A Manual on ASIC Front to Back End Design Flow. - Joachim Neves Rodrigues; Matthias Kamuf; Hugo Hedberg; Viktor Öwall (MSE, 2005)

Digital implementation of a wavelet-based event detector for cardiac pacemakers. - Joachim Neves Rodrigues; Thomas Olsson 001; Leif Sörnmo; Viktor Öwall (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Energy Dissipation Reduction of a Cardiac Event Detector in the Sub-Vt Domain By Architectural Folding. - Joachim Neves Rodrigues; Omer Can Akgun; Puneet Acharya; Adolfo de la Calle; Yusuf Leblebici; Viktor Öwall (PATMOS, 2009)

Minimum-Energy Sub-threshold Self-Timed Circuits: Design Methodology and a Case Study. - Omer Can Akgun; Joachim Neves Rodrigues; Jens Sparsø (ASYNC, 2010)

Hardware Implementation of an Iterative Sampling Rate Converter for Wireless Communication. - Michal Stala; Can Bilgin; Rakesh Gangarajaiah; Joachim Neves Rodrigues (GLOBECOM, 2010)

A sign-bit auto-correlation architecture for fractional frequency offset estimation in OFDM. - Isael Diaz; Leif R. Wilhelmsson; Joachim Neves Rodrigues; Johan Löfgren; Thomas Olsson 001; Viktor Öwall (ISCAS, 2010)

A < 1 pJ sub-VT cardiac event detector in 65 nm LL-HVT CMOS. - Joachim Neves Rodrigues; Omer Can Akgun; Viktor Öwall (VLSI-SoC, 2010)

Design and measurement of a variable-rate Viterbi decoder in 130-nm digital CMOS. - Matthias Kamuf; Joachim Neves Rodrigues; John B. Anderson; Viktor Öwall (Microprocess. Microsystems, 2010)

Synthesis strategies for sub-VT systems. - Pascal Andreas Meinerzhagen; Oskar Andersson; S. M. Yasser Sherazi; Andreas Peter Burg; Joachim Neves Rodrigues (ECCTD, 2011)

Design exploration of a 65 nm Sub-VT CMOS digital decimation filter chain. - S. M. Yasser Sherazi; Peter Nilsson 001; Omer Can Akgun; Henrik Sjöland; Joachim Neves Rodrigues (ISCAS, 2011)

Reconfigurable cell array for concurrent support of multiple radio standards by flexible mapping. - Chenxin Zhang; Isael Diaz; Per Andersson; Joachim Neves Rodrigues; Viktor Öwall (ISCAS, 2011)

Impact of switching activity on the energy minimum voltage for 65 nm sub-VT CMOS. - Oskar Andersson; S. M. Yasser Sherazi; Joachim Neves Rodrigues (NORCHIP, 2011)

A GALS ASIC implementation from a CAL dataflow description. - Hemanth Prabhu; Sherine Thomas; Joachim Neves Rodrigues; Thomas Olsson 001; Anders Carlsson (NORCHIP, 2011)

Highly scalable implementation of a robust MMSE channel estimator for OFDM multi-standard environment. - Isael Diaz; Balaji Sathyanarayanan; Alirad Malek; Farzad Foroughi; Joachim Neves Rodrigues (SiPS, 2011)

Benchmarking of Standard-Cell Based Memories in the Sub- VT Domain in 65-nm CMOS Technology. - Pascal Andreas Meinerzhagen; S. M. Yasser Sherazi; Andreas Peter Burg; Joachim Neves Rodrigues (IEEE J. Emerg. Sel. Topics Circuits Syst., 2011)

Energy-minimum sub-threshold self-timed circuits using current-sensing completion detection. - Omer Can Akgun; Joachim Neves Rodrigues; Jens Sparsø (IET Comput. Digit. Tech., 2011)

A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS. - Pascal Andreas Meinerzhagen; Oskar Andersson; Babak Mohammadi; S. M. Yasser Sherazi; Andreas Peter Burg; Joachim Neves Rodrigues (ESSCIRC, 2012)

A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS. - S. M. Yasser Sherazi; Peter Nilsson 001; Henrik Sjöland; Joachim Neves Rodrigues (ICECS, 2012)

TamaRISC-CS: An ultra-low-power application-specific processor for compressed sensing. - Jeremy Constantin; Ahmed Yasir Dogan; Oskar Andersson; Pascal Andreas Meinerzhagen; Joachim Neves Rodrigues; David Atienza; Andreas Burg 001 (VLSI-SoC, 2012)

An Ultra-Low-Power Application-Specific Processor with Sub-VT Memories for Compressed Sensing. - Jeremy Constantin; Ahmed Yasir Dogan; Oskar Andersson; Pascal Andreas Meinerzhagen; Joachim Neves Rodrigues; David Atienza; Andreas Burg 001 (VLSI-SoC (Selected Papers), 2012)

A Receiver Architecture for Devices in Wireless Body Area Networks. - Henrik Sjöland; John B. Anderson; Carl Bryant; Rohit Chandra; Ove Edfors; Anders J. Johansson; Nafiseh Seyed Mazloum; Reza Meraji; Peter Nilsson 001; Dejan Radjen; Joachim Neves Rodrigues; S. M. Yasser Sherazi; et al. (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

High-Level Energy Estimation in the Sub-V$_{{ rm T}}$ Domain: Simulation and Measurement of a Cardiac Event Detector. - Omer Can Akgun; Joachim Neves Rodrigues; Yusuf Leblebici; Viktor Öwall (IEEE Trans. Biomed. Circuits Syst., 2012)

Ultra-Low-Power Error Correction Circuits: Technology Scaling and Sub-VT Operation. - Chris Winstead; Joachim Neves Rodrigues (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

Dual-VT 4kb sub-VT memories with <1 pW/bit leakage in 65 nm CMOS. - Oskar Andersson; Babak Mohammadi; Pascal Meinerzhagen; Andreas Burg 001; Joachim Neves Rodrigues (ESSCIRC, 2013)

Nex generation digital front-end for multi-standard concurrent reception. - Isael Diaz; Chenxin Zhang; Lieven Hollevoet; Jim Svensson; Joachim Neves Rodrigues; Leif R. Wilhelmsson; Thomas Olsson 001; Liesbet Van der Perre; Viktor Öwall (NORCHIP, 2013)

A 65-nm CMOS area optimized de-synchronization flow for sub-VT designs. - Christoph Thomas Muller; Steffen Malkowsky; Oskar Andersson; Babak Mohammadi; Jens Sparsø; Joachim Neves Rodrigues (VLSI-SoC, 2013)

Approximative matrix inverse computations for very-large MIMO and applications to linear pre-coding systems. - Hemanth Prabhu; Joachim Neves Rodrigues; Ove Edfors; Fredrik Rusek (WCNC, 2013)

Ultra low energy design exploration of digital decimation filters in 65 nm dual-VT CMOS in the sub-VT domain. - S. M. Yasser Sherazi; Joachim Neves Rodrigues; Omer Can Akgun; Henrik Sjöland; Peter Nilsson 001 (Microprocess. Microsystems, 2013)

A 35 fJ/bit-access sub-VT memory using a dual-bit area-optimized standard-cell in 65 nm CMOS. - Oskar Andersson; Babak Mohammadi; Pascal Andreas Meinerzhagen; Joachim Neves Rodrigues (ESSCIRC, 2014)

Lessons from ten years of the international master's program in System-on-Chip. - Peter Nilsson 001; Pietro Andreani; Krzysztof Kuchcinski; Joachim Rodrigues; Henrik Sjöland; Markus Törmänen; Lars-Erik Wernersson; Viktor Öwall (EWME, 2014)

A 65 nm single stage 28 fJ/cycle 0.12 to 1.2V level-shifter. - Babak Mohammadi; Joachim Neves Rodrigues (ISCAS, 2014)

Hardware efficient approximative matrix inversion for linear pre-coding in massive MIMO. - Hemanth Prabhu; Ove Edfors; Joachim Neves Rodrigues; Liang Liu 002; Fredrik Rusek (ISCAS, 2014)

A low-complex peak-to-average power reduction scheme for OFDM based massive MIMO systems. - Hemanth Prabhu; Ove Edfors; Joachim Neves Rodrigues; Liang Liu 002; Fredrik Rusek (ISCCSP, 2014)

Ultra low power transceivers for wireless sensors and body area networks. - Henrik Sjöland; John B. Anderson; Carl Bryant; Rohit Chandra; Ove Edfors; Anders J. Johansson; Nafiseh Seyed Mazloum; Reza Meraji; Peter Nilsson 001; Dejan Radjen; Joachim Neves Rodrigues; S. M. Yasser Sherazi; et al. (ISMICT, 2014)

Algorithm and hardware aspects of pre-coding in massive MIMO systems. - Hemanth Prabhu; Joachim Neves Rodrigues; Liang Liu 002; Ove Edfors (ACSSC, 2015)

Ultra low energy and area efficient charge pump with automatic clock controller in 65 nm CMOS. - Babak Mohammadi; Joachim Neves Rodrigues (A-SSCC, 2015)

A 400 mV atrial fibrillation detector with 0.56 pJ/operation in 65nm CMOS. - Oskar Andersson; Joachim Neves Rodrigues (ISCAS, 2015)

High throughput constant envelope pre-coder for massive MIMO systems. - Hemanth Prabhu; Fredrik Rusek; Joachim Neves Rodrigues; Ove Edfors (ISCAS, 2015)

Digital background calibration in continuous-time delta-sigma analog to digital converters. - Siyu Tan; Yun Miao; Mattias Palm; Joachim Rodrigues; Pietro Andreani (NORCAS, 2015)

A 128-channel discrete cosine transform-based neural signal processor for implantable neural recording microsystems. - Hossein Hosseini-Nejad; Abumoslem Jannesari; Amir M. Sodagar; Joachim Neves Rodrigues (Int. J. Circuit Theory Appl., 2015)

A new digital front-end for flexible reception in software defined radio. - Isael Diaz; Chenxin Zhang; Lieven Hollevoet; Jim Svensson; Joachim Neves Rodrigues; Leif R. Wilhelmsson; Thomas Olsson 001; Liesbet Van der Perre; Viktor Öwall (Microprocess. Microsystems, 2015)

A 290 mV Sub-V𝕋 ASIC for Real-Time Atrial Fibrillation Detection. - Oskar Andersson; Ki H. Chon; Leif Sörnmo; Joachim Neves Rodrigues (IEEE Trans. Biomed. Circuits Syst., 2015)

An area efficient single-cycle xVDD sub-Vth on-chip boost scheme in 28 nm FD-SOI. - Babak Mohammadi; Oskar Andersson; Xiao Luo; Masoud Nouripayam; Joachim Neves Rodrigues (A-SSCC, 2016)

A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI. - Babak Mohammadi; Oskar Andersson; Joseph Nguyen; Lorenzo Ciampolini; Andreia Cathelin; Joachim Neves Rodrigues (ESSCIRC, 2016)

Logic filter cache for wide-VDD-range processors. - Alen Bardizbanyan; Oskar Andersson; Joachim Neves Rodrigues; Per Larsson-Edefors (ICECS, 2016)

Improving practical sensitivity of energy optimized wake-up receivers: proof of concept in 65nm CMOS. - Nafiseh Seyed Mazloum; Joachim Neves Rodrigues; Oskar Andersson; Anders Nejdel; Ove Edfors (CoRR, 2016)

Ultra Low Voltage Synthesizable Memories: A Trade-Off Discussion in 65 nm CMOS. - Oskar Andersson; Babak Mohammadi; Pascal Meinerzhagen; Andreas Burg 001; Joachim Neves Rodrigues (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

3.6 A 60pJ/b 300Mb/s 128×8 Massive MIMO precoder-detector in 28nm FD-SOI. - Hemanth Prabhu; Joachim Neves Rodrigues; Liang Liu 002; Ove Edfors (ISSCC, 2017)

65-nm CMOS low-energy RNS modular multiplier for elliptic-curve cryptography. - Shahzad Asif; Oskar Andersson; Joachim Neves Rodrigues; Yinan Kong (IET Comput. Digit. Tech., 2018)

A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI. - Babak Mohammadi; Oskar Andersson; Joseph Nguyen; Lorenzo Ciampolini; Andreia Cathelin; Joachim Neves Rodrigues (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Low-Voltage 6T Dual-Port Configured SRAM with Wordline Boost in 28 nm FD-SOI. - Masoud Nouripayam; Joachim Rodrigues; Xiao Luo; Tom Johansson; Babak Mohammadi (ESSCIRC, 2021)

An Energy-Efficient Near-Memory Computing Architecture for CNN Inference at Cache Level. - Masoud Nouripayam; Arturo Prieto; Vignajeth Kuttuva Kishorelal; Joachim Rodrigues (ICECS, 2021)

An 88% fractional bandwidth reconfigurable power amplifier for NB-IoT and LTE-M in 22 nm CMOS FDSOI. - Baktash Behmanesh; Joachim Rodrigues; Henrik Sjöland (NorCAS, 2022)

High-Density Standard Cell Library for Sequential 3D Integrated Circuits. - Arturo Prieto; Joachim Rodrigues (VLSI-SoC, 2024)

Improving Chip Design Enablement for Universities in Europe - A Position Paper. - Lukas Krupp; Ian O'Connor; Luca Benini; Christoph Studer; Joachim Rodrigues; Norbert Wehn (DATE, 2025)

A Scalable All-Digital Near-Memory Computing Architecture for Edge AIoT Applications. - Masoud Nouripayam; Arturo Prieto; Joachim Rodrigues (IEEE Access, 2025)