Dynamic Communication and Architecture of Parallel Processors. - Marlin H. Mickle; JoAnn M. Paul (Parallel and Distributed Computing and Systems, 1995)

The Dynamic Analysis of MIMD Architectures. - Marlin H. Mickle; William G. Vogt; JoAnn M. Paul (Parallel and Distributed Computing and Systems, 1995)

Load Balancing Using Heterogeneous Processors for Continuum Problems on a Mesh. - Marlin H. Mickle; JoAnn M. Paul (J. Parallel Distributed Comput., 1996)

Peer-based multithreaded executable co-specification. - Donald E. Thomas; JoAnn M. Paul; Simon N. Peffers; Sandra J. Weber (CODES, 1999)

Frequency interleaving as a codesign scheduling paradigm. - JoAnn M. Paul; Simon N. Peffers; Donald E. Thomas (CODES, 2000)

A codesign virtual machine for hierarchical, balanced hardware/software system modeling. - JoAnn M. Paul; Simon N. Peffers; Donald E. Thomas (DAC, 2000)

Modeling and evaluation of hardware/software designs. - Neal K. Tibrewala; JoAnn M. Paul; Donald E. Thomas (CODES, 2001)

Modeling and simulation of steady state and transient behaviors for emergent SoCs. - JoAnn M. Paul; Arne J. Suppé; Donald E. Thomas (ISSS, 2001)

Co-RAM: combinational logic synthesis applied to software partitions for mapping to a novel memory device. - Sandra J. Weber; JoAnn M. Paul; Donald E. Thomas (IEEE Trans. Very Large Scale Integr. Syst., 2001)

The design context of concurrent computation systems. - JoAnn M. Paul; Christopher M. Eatedali; Donald E. Thomas (CODES, 2002)

A Layered, Codesign Virtual Machine Approach to Modeling Computer Systems. - JoAnn M. Paul; Donald E. Thomas (DATE, 2002)

Multi-Level Modeling of Software on Hardware in Concurrent Computation. - JoAnn M. Paul; Arne J. Suppé; Henele I. Adams; Donald E. Thomas (IPDPS, 2002)

System-Level Modeling of a Network Switch SoC. - Andrew S. Cassidy; Christopher P. Andrews; Donald E. Thomas; JoAnn M. Paul (ISSS, 2002)

Programmers' views of SoCs. - JoAnn M. Paul (CODES+ISSS, 2003)

Schedulers as model-based design elements in programmable heterogeneous multiprocessors. - JoAnn M. Paul; Alex Bobrek; Jeffrey E. Nelson; Joshua J. Pieper; Donald E. Thomas (DAC, 2003)

Layered, Multi-Threaded, High-Level Performance Design. - Andrew S. Cassidy; JoAnn M. Paul; Donald E. Thomas (DATE, 2003)

Benchmark-based design strategies for single chip heterogeneous multiprocessors. - JoAnn M. Paul; Donald E. Thomas; Alex Bobrek (CODES+ISSS, 2004)

High level cache simulation for heterogeneous multiprocessors. - Joshua J. Pieper; Alain Mellan; JoAnn M. Paul; Donald E. Thomas; Faraydon Karim (DAC, 2004)

Modeling Shared Resource Contention Using a Hybrid Simulation/Analytical Approach. - Alex Bobrek; Joshua J. Pieper; Jeffrey E. Nelson; JoAnn M. Paul; Donald E. Thomas (DATE, 2004)

Scenario-Oriented Design for Single Chip Heterogeneous Multiprocesso. - JoAnn M. Paul (IPDPS, 2005)

Power-Performance Simulation and Design Strategies for Single-Chip Heterogeneous Multiprocessors. - Brett H. Meyer; Joshua J. Pieper; JoAnn M. Paul; Jeffrey E. Nelson; Sean M. Pieper; Anthony G. Rowe (IEEE Trans. Computers, 2005)

Undergraduate embedded system education at Carnegie Mellon. - Philip Koopman; Howie Choset; Rajeev Gandhi; Bruce H. Krogh; Diana Marculescu; Priya Narasimhan; JoAnn M. Paul; Ragunathan Rajkumar; Daniel P. Siewiorek; Asim Smailagic; Peter Steenkiste; Donald E. Thomas; et al. (ACM Trans. Embed. Comput. Syst., 2005)

High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors. - JoAnn M. Paul; Donald E. Thomas; Andrew S. Cassidy (ACM Trans. Design Autom. Electr. Syst., 2005)

What's in a Name. - JoAnn M. Paul (Computer, 2006)

Scenario-oriented design for single-chip heterogeneous multiprocessors. - JoAnn M. Paul; Donald E. Thomas; Alex Bobrek (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Event-based re-training of statistical contention models for heterogeneous multiprocessors. - Alex Bobrek; JoAnn M. Paul; Donald E. Thomas (CODES+ISSS, 2007)

Shared Resource Access Attributes for High-Level Contention Models. - Alex Bobrek; JoAnn M. Paul; Donald E. Thomas (DAC, 2007)

A New Era of Performance Evaluation. - Sean M. Pieper; JoAnn M. Paul; Michael J. Schulte (Computer, 2007)

Amdahl's Law Revisited for Single Chip Systems. - JoAnn M. Paul; Brett H. Meyer (Int. J. Parallel Program., 2007)

Webpage-based benchmarks for mobile device design. - Marc Somers; JoAnn M. Paul (ASP-DAC, 2008)

Holistic design and caching in mobile computing. - Mwaffaq Otoom; JoAnn M. Paul (CODES+ISSS, 2008)

Interrupt modeling for efficient high-level scheduler design space exploration. - F. Ryan Johnson; JoAnn M. Paul (ACM Trans. Design Autom. Electr. Syst., 2008)

The Emerging Landscape of Computer Performance Evaluation. - JoAnn M. Paul; Mwaffaq Otoom; Marc Somers; Sean M. Pieper; Michael J. Schulte (Adv. Comput., 2009)

Stochastic Contention Level Simulation for Single-Chip Heterogeneous Multiprocessors. - Alex Bobrek; JoAnn M. Paul; Donald E. Thomas (IEEE Trans. Computers, 2010)

Capacity metric for chip heterogeneous multiprocessors. - Mwaffaq Otoom; JoAnn M. Paul (CODES+ISSS, 2011)

Workload Mode Identification for Chip Heterogeneous Multiprocessors. - Mwaffaq Otoom; JoAnn M. Paul (Int. J. Parallel Program., 2012)

Contextual partitioning for speech recognition. - Christopher G. Kent; JoAnn M. Paul (ACM Trans. Embed. Comput. Syst., 2013)

Chip-level programming of heterogeneous multiprocessors. - Mwaffaq Otoom; JoAnn M. Paul (IDT, 2015)

Multiprocessor Capacity Metric and Analysis. - Mwaffaq Otoom; JoAnn M. Paul (IEEE Trans. Computers, 2015)

Building Maze Solutions with Computational Dreaming. - Scott M. Jackson; JoAnn M. Paul (IEEE Micro, 2017)

Paradox, Conflict, and Structural Intelligence. - JoAnn M. Paul; Isaac Bettendorf (Computer, 2025)