Integrated mixed-mode digital-analog filter converters. - João C. Vital; José E. Franca; Franco Maloberti (IEEE J. Solid State Circuits, 1990)

A Concurrent Two-step Flash Analogue-to-digital Converter Architecture. - João C. Vital; José E. Franca (ISCAS, 1993)

Fully-digital Testability of a High-speed Conversion System. - João C. Vital; José E. Franca; Nuno S. Silva (ISCAS, 1993)

High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities. - João C. Vital; José E. Franca (VLSI Design, 1993)

A CMOS analog-digital audio processor for a portable radiotelephone. - Jorge Guilherme; F. P. Martins; João C. Vital; José E. Franca (IEEE J. Solid State Circuits, 1993)

Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration. - João Goes; João C. Vital; José E. Franca (ISCAS, 1995)

RAPID-retargetability for reusability of application-driven quadrature D/A interface block design. - José E. Franca; Nuno Horta; M. Pereira; João C. Vital; Rafael Castro-López; Manuel Delgado-Restituto; Francisco V. Fernández 001; Ángel Rodríguez-Vázquez; J. Ramos; P. Santos (ICECS, 1999)

A Skill-based library for retargetable embedded analog cores. - Jingnan Xu; João C. Vital; Nuno Horta (DATE, 2001)

Design considerations for high resolution pipeline ADCs in digital CMOS technology. - Jorge Guilherme; Pedro M. Figueiredo; Pedro Azevedo; Goncalo Minderico; Antonio Leal; João C. Vital; José E. Franca (ICECS, 2001)

A true logarithmic analog-to-digital pipeline converter with 1.5 bit/stage and digital correction. - Jorge Guilherme; João C. Vital; José E. Franca (ICECS, 2001)

IC design automation from circuit level optimization to retargetable layout. - Jingnan Xu; J. Serras; M. Oliveira; R. Belo; M. Bugalho; João C. Vital; Nuno Horta; José E. Franca (ICECS, 2001)

A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications. - Jorge Guilherme; Pedro M. Figueiredo; Pedro Azevedo; Goncalo Minderico; Antonio Leal; João C. Vital; José E. Franca (ISCAS (1), 2001)

A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dB. - Jorge Guilherme; João C. Vital; José E. Franca (ICECS, 2002)

Analysis of the averaging technique in flash ADCs. - Pedro M. Figueiredo; João C. Vital (ISCAS (1), 2003)

Termination of averaging networks in flash ADCs. - Pedro M. Figueiredo; João C. Vital (ISCAS (1), 2004)

Low kickback noise techniques for CMOS latched comparators. - Pedro M. Figueiredo; João C. Vital (ISCAS (1), 2004)

Averaging technique in flash analog-to-digital converters. - Pedro M. Figueiredo; João C. Vital (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

The MOS capacitor amplifier. - Pedro M. Figueiredo; João C. Vital (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

A 90nm CMOS 1.2v 6b 1GS/s two-step subranging ADC. - Pedro M. Figueiredo; Paulo Cardoso; Ana Lopes; Carlos Fachada; Naoyuki Hamanishi; Ken Tanabe; João C. Vital (ISSCC, 2006)

Kickback noise reduction techniques for CMOS latched comparators. - Pedro M. Figueiredo; João C. Vital (IEEE Trans. Circuits Syst. II Express Briefs, 2006)