Towards an automatic path from JavaTM bytecodes to hardware through high-level synthesis. - João M. P. Cardoso; Horácio C. Neto (ICECS, 1998)

Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System. - João M. P. Cardoso; Horácio C. Neto (FCCM, 1999)

An Enhanced Static-List Scheduling Algorithm for Temporal Partitioning onto RPUs. - João M. P. Cardoso; Horácio C. Neto (VLSI, 1999)

Architectures and compilers to support reconfigurable computing. - João M. P. Cardoso; Mário P. Vestístias (XRDS, 1999)

Novel Algorithm Combining Temporal Partitioning and Sharing of Functional Units. - João M. P. Cardoso (FCCM, 2001)

Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines. - João M. P. Cardoso; Horácio C. Neto (FPL, 2001)

Fast and Guaranteed C Compilation onto the PACT-XPP? Reconfigurable Computing Platform. - João M. P. Cardoso; Markus Weinhardt (FCCM, 2002)

XPP-VC: A C Compiler with Temporal Partitioning for the PACT-XPP Architecture. - João M. P. Cardoso; Markus Weinhardt (FPL, 2002)

From C Programs to the Configure-Execute Model. - João M. P. Cardoso; Markus Weinhardt (DATE, 2003)

Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms. - João M. P. Cardoso (IPDPS, 2003)

ARCHITECT-R: A System for Reconfigurable Robots Design. - R. A. Gonçalves; P. A. Moraes; João M. P. Cardoso; Denis F. Wolf; Marcio Merino Fernandes; Roseli A. Francelin Romero; Eduardo Marques (SAC, 2003)

Compilation for FPGA-Based Reconfigurable Hardware. - João M. P. Cardoso; Horácio C. Neto (IEEE Des. Test Comput., 2003)

On Combining Temporal Partitioning and Sharing of Functional Units in Compilation for Reconfigurable Architectures. - João M. P. Cardoso (IEEE Trans. Computers, 2003)

An Environment for Exploring Data-Driven Architectures. - Ricardo S. Ferreira 001; João M. P. Cardoso; Horácio C. Neto (FPL, 2004)

A Real Time Gesture Recognition System for Mobile Robots. - Vanderlei Bonato; Adriano K. Sanches; Marcio Merino Fernandes; João M. P. Cardoso; Eduardo do Valle Simões; Eduardo Marques (ICINCO (2), 2004)

Self-loop Pipelining and Reconfigurable Dataflow Arrays. - João M. P. Cardoso (SAMOS, 2004)

Modeling Loop Unrolling: Approaches and Open Issues. - João M. P. Cardoso; Pedro C. Diniz (SAMOS, 2004)

On Estimations for Compiling Software to FPGA-based Systems. - João M. P. Cardoso (ASAP, 2005)

Dynamic loop pipelining in data-driven architectures. - João M. P. Cardoso (Conf. Computing Frontiers, 2005)

An Infrastructure to Functionally Test Designs Generated by Compilers Targeting FPGAs. - Rui Rodrigues 004; João M. P. Cardoso (DATE, 2005)

New challenges in computer science education. - João M. P. Cardoso (ITiCSE, 2005)

Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping. - Ricardo S. Ferreira 001; João M. P. Cardoso; Andre Toledo; Horácio C. Neto (SAMOS, 2005)

Regular expression matching for reconfigurable packet inspection. - João Bispo; Ioannis Sourdis; João M. P. Cardoso; Stamatis Vassiliadis (FPT, 2006)

An Innovative Maintenance Solution for Complex Machinery: The Kobas Project Case. - Américo Azevedo; Paula Silva; Cesar Toscano; João M. P. Cardoso (BASYS, 2006)

Mesh Mapping Exploration for Coarse-Grained Reconfigurable Array Architectures. - Marcos Vinícius da Silva; Ricardo S. Ferreira 001; Alisson Garcia; João M. P. Cardoso (ReConFig, 2006)

A Methodology to Design FPGA-based PID Controllers. - João Miguel Gago Pontes de Brito Lima; Ricardo Menotti; João M. P. Cardoso; Eduardo Marques (SMC, 2006)

Synthesis of Regular Expressions Targeting FPGAs: Current Status and Open Issues. - João Bispo; Ioannis Sourdis; João M. P. Cardoso; Stamatis Vassiliadis (ARC, 2007)

A Data-Driven Approach for Pipelining Sequences of Data-Dependent Loops. - Rui Rodrigues 004; João M. P. Cardoso; Pedro C. Diniz (FCCM, 2007)

Aggressive Loop Pipelining for Reconfigurable Architectures. - Ricardo Menotti; Eduardo Marques; João M. P. Cardoso (FPL, 2007)

Using Rewriting Logic to Match Patterns of Instructions from a Compiler Intermediate Form to Coarse-Grained Processing Elements. - Carlos Morra; João M. P. Cardoso; Jürgen Becker 001 (IPDPS, 2007)

A Polynomial Placement Algorithm for Data Driven Coarse-Grained Reconfigurable Architectures. - Ricardo S. Ferreira 001; Alisson Garcia; Tiago Teixeira; João M. P. Cardoso (ISVLSI, 2007)

An FPGA Implementation for a Kalman Filter with Application to Mobile Robotics. - Vanderlei Bonato; Rafael Peron; Denis F. Wolf; José A. M. de Holanda; Eduardo Marques; João M. P. Cardoso (SIES, 2007)

On Adapting Power Estimation Models for Embedded Soft-Core Processors. - José A. M. de Holanda; Jecel Assumpcao; Denis F. Wolf; Eduardo Marques; João M. P. Cardoso (SIES, 2007)

On Pipelining Sequences of Data-Dependent Loops. - Rui M. M. Rodrigues; João M. P. Cardoso (J. Univers. Comput. Sci., 2007)

Combining Rewriting-Logic, Architecture Generation, and Simulation to Exploit Coarse-Grained Reconfigurable Architectures. - Carlos Morra; João Bispo; João M. P. Cardoso; Jürgen Becker 001 (FCCM, 2008)

Sorting Units for FPGA-Based Embedded Systems. - Rui Marcelino; Horácio C. Neto; João M. P. Cardoso (DIPES, 2008)

Retargeting, Evaluating, and Generating Reconfigurable Array-Based Architectures. - Carlos Morra; João M. P. Cardoso; João Bispo; Jürgen Becker 001 (SASP, 2008)

Regular Expression Matching in Reconfigurable Hardware. - Ioannis Sourdis; João Bispo; João M. P. Cardoso; Stamatis Vassiliadis (J. Signal Process. Syst., 2008)

On Simplifying Placement and Routing by Extending Coarse-Grained Reconfigurable Arrays with Omega Networks. - Ricardo S. Ferreira 001; Alex Damiany; Julio C. Goldner Vendramini; Tiago Teixeira; João M. P. Cardoso (ARC, 2009)

Automatic generation of FPGA hardware accelerators using a domain specific language. - Ricardo Menotti; João M. P. Cardoso; Marcio Merino Fernandes; Eduardo Marques (FPL, 2009)

Code Transformations for Embedded Reconfigurable Computing Architectures. - Pedro C. Diniz; João M. P. Cardoso (GTTSE, 2009)

Unbalanced FIFO sorting for FPGA-based systems. - Rui Marcelino; Horácio C. Neto; João M. P. Cardoso (ICECS, 2009)

An Analysis of Navigation Algorithms for Smartphones Using J2ME. - André C. Santos; Luís Tarrataca; João M. P. Cardoso (MOBILWARE, 2009)

Context Inference for Mobile Applications in the UPCASE Project. - André C. Santos; Luís Tarrataca; João M. P. Cardoso; Diogo R. Ferreira; Pedro C. Diniz; Paulo Chainho (MOBILWARE, 2009)

Mobile Context Provider for Social Networking. - André C. Santos; João M. P. Cardoso; Diogo R. Ferreira; Pedro C. Diniz (OTM Workshops, 2009)

The current feasibility of gesture recognition for a smartphone using J2ME. - Luís Tarrataca; André C. Santos; João M. P. Cardoso (SAC, 2009)

LALP: A Novel Language to Program Custom FPGA-Based Architectures. - Ricardo Menotti; João M. P. Cardoso; Marcio Merino Fernandes; Eduardo Marques (SBAC-PAD, 2009)

On Identifying Segments of Traces for Dynamic Compilation. - João Bispo; João M. P. Cardoso (FPL, 2010)

On Identifying Patterns in Code Repositories to Assist the Generation of Hardware Templates. - Adriano K. Sanches; João M. P. Cardoso (FPL, 2010)

On identifying and optimizing instruction sequences for dynamic compilation. - João Bispo; João M. P. Cardoso (FPT, 2010)

Welcome message. - Jürgen Becker 001; Eli Bozorgzadeh; João M. P. Cardoso; Aravind Dasu (IPDPS Workshops, 2010)

A Query Processing Strategy for Conceptual Queries Based on Object-Role Modeling. - António Rosado; João M. P. Cardoso (NSS, 2010)

Compiling for reconfigurable computing: A survey. - João M. P. Cardoso; Pedro C. Diniz; Markus Weinhardt (ACM Comput. Surv., 2010)

The Feasibility of Navigation Algorithms on Smartphones using J2ME. - André C. Santos; Luís Tarrataca; João M. P. Cardoso (Mob. Networks Appl., 2010)

Providing user context for mobile and social networking applications. - André C. Santos; João M. P. Cardoso; Diogo R. Ferreira; Pedro C. Diniz; Paulo Chainho (Pervasive Mob. Comput., 2010)

Preprocessing techniques for context recognition from accelerometer data. - Davide Figo; Pedro C. Diniz; Diogo R. Ferreira; João M. P. Cardoso (Pers. Ubiquitous Comput., 2010)

A Domain-Specific Language for the Specification of Adaptable Context Inference. - André C. Santos; Pedro C. Diniz; João M. P. Cardoso; Diogo R. Ferreira (EUC, 2011)

Techniques for Dynamically Mapping Computations to Coprocessors. - João Bispo; João M. P. Cardoso (ReConFig, 2011)

From Instruction Traces to Specialized Reconfigurable Arrays. - João Bispo; Nuno Miguel Cardanha Paulino; João M. P. Cardoso; João Canas Ferreira (ReConFig, 2011)

Identifying Merge-Beneficial Software Kernels for Hardware Implementation. - Adriano K. Sanches; João M. P. Cardoso; Alexandre C. B. Delbem (ReConFig, 2011)

Selected Papers from the 17th Reconfigurable Architectures Workshop (RAW2010). - Aravind Dasu; João M. P. Cardoso; Eli Bozorgzadeh; Jürgen Becker 001 (Int. J. Reconfigurable Comput., 2011)

Fast placement and routing by extending coarse-grained reconfigurable arrays with Omega Networks. - Ricardo S. Ferreira 001; João M. P. Cardoso; Alex Damiany; Julio C. Goldner Vendramini; Tiago Teixeira (J. Syst. Archit., 2011)

Analysis of error detection schemes: Toolchain support and hardware/software implications. - Ali Azarian; João Canas Ferreira; Stephan Werner 002; Zlatko Petrov; João M. P. Cardoso; Michael Hübner 001 (AHS, 2012)

LARA: an aspect-oriented programming language for embedded systems. - João M. P. Cardoso; Tiago Carvalho 001; José Gabriel F. Coutinho; Wayne Luk; Ricardo Nobre; Pedro C. Diniz; Zlatko Petrov (AOSD, 2012)

Experiments with the LARA aspect-oriented approach. - José Gabriel F. Coutinho; Tiago Carvalho 001; Sérgio Durand; João M. P. Cardoso; Ricardo Nobre; Pedro C. Diniz; Wayne Luk (AOSD (Companion), 2012)

Resource-Efficient Designs Using an Aspect-Oriented Approach. - José Gabriel F. Coutinho; Sujit Bhattacharya 002; Wayne Luk; George A. Constantinides; João M. P. Cardoso; Tiago Carvalho 001; Pedro C. Diniz; Zlatko Petrov (CSE, 2012)

Controlling Hardware Synthesis with Aspects. - João M. P. Cardoso; Tiago Carvalho 001; José Gabriel F. Coutinho; Pedro C. Diniz; Zlatko Petrov; Wayne Luk (DSD, 2012)

Specifying Compiler Strategies for FPGA-based Systems. - João M. P. Cardoso; João Teixeira; José C. Alves; Ricardo Nobre; Pedro C. Diniz; José Gabriel F. Coutinho; Wayne Luk (FCCM, 2012)

Program and Aspect Metrics for MATLAB. - Pedro Martins 001; Paulo Lopes; João Paulo Fernandes; João Saraiva; João M. P. Cardoso (ICCSA (4), 2012)

Programming strategies for runtime adaptability. - João M. P. Cardoso (ReCoSoC, 2012)

Hardware/software specialization through aspects: The LARA approach. - João M. P. Cardoso; Tiago Carvalho 001; João Teixeira; Pedro C. Diniz; Fernando M. Gonçalves; Zlatko Petrov (ICSAMOS, 2012)

Hardware pipelining of runtime-detected loops. - João Bispo; João M. P. Cardoso; José Monteiro 001 (SBCCI, 2012)

LALP: A Language to Program Custom FPGA-Based Acceleration Engines. - Ricardo Menotti; João M. P. Cardoso; Marcio Merino Fernandes; Eduardo Marques (Int. J. Parallel Program., 2012)

Deriving Resource Efficient Designs Using the REFLECT Aspect-Oriented Approach - (Extended Abstract). - José Gabriel F. Coutinho; João M. P. Cardoso; Tiago Carvalho 001; Ricardo Nobre; Sujit Bhattacharya 002; Pedro C. Diniz; Liam Fitzpatrick; Razvan Nane (ARC, 2013)

Architecture for Transparent Binary Acceleration of Loops with Memory Accesses. - Nuno Miguel Cardanha Paulino; João Canas Ferreira; João M. P. Cardoso (ARC, 2013)

An automatic tool flow for the combined implementation of multi-mode circuits. - Brahim Al Farisi; Karel Bruneel; João M. P. Cardoso; Dirk Stroobandt (DATE, 2013)

The MATISSE MATLAB compiler. - João Bispo; Pedro Pinto 002; Ricardo Nobre; Tiago Carvalho 001; João M. P. Cardoso; Pedro C. Diniz (INDIN, 2013)

An FPGA-based multi-core approach for pipelining computing stages. - Ali Azarian; João M. P. Cardoso; Stephan Werner 002; Jürgen Becker 001 (SAC, 2013)

Specifying Adaptations through a DSL with an Application to Mobile Robot Navigation. - André C. Santos; João M. P. Cardoso; Pedro C. Diniz; Diogo R. Ferreira (SLATE, 2013)

Transparent Runtime Migration of Loop-Based Traces of Processor Instructions to Reconfigurable Processing Units. - João Bispo; Nuno Miguel Cardanha Paulino; João M. P. Cardoso; João Canas Ferreira (Int. J. Reconfigurable Comput., 2013)

Enriching MATLAB with aspect-oriented features for developing embedded systems. - João M. P. Cardoso; João M. Fernandes 001; Miguel P. Monteiro 001; Tiago Carvalho 001; Ricardo Nobre (J. Syst. Archit., 2013)

Controlling a complete hardware synthesis toolchain with LARA aspects. - João M. P. Cardoso; Tiago Carvalho 001; José Gabriel F. Coutinho; Ricardo Nobre; Razvan Nane; Pedro C. Diniz; Zlatko Petrov; Wayne Luk; Koen Bertels (Microprocess. Microsystems, 2013)

Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems. - João Bispo; Nuno Miguel Cardanha Paulino; João M. P. Cardoso; João Canas Ferreira (IEEE Trans. Ind. Informatics, 2013)

A clustering-based approach for exploring sequences of compiler optimizations. - Luiz G. A. Martins; Ricardo Nobre; Alexandre C. B. Delbem; Eduardo Marques; João M. P. Cardoso (IEEE Congress on Evolutionary Computation, 2014)

Coarse/Fine-grained Approaches for Pipelining Computing Stages in FPGA-Based Multicore Architectures. - Ali Azarian; João M. P. Cardoso (Euro-Par Workshops (2), 2014)

On Expressing Strategies for Directive-Driven Multicore Programing Models. - Ricardo Nobre; Pedro Pinto 002; Tiago Carvalho 001; João M. P. Cardoso; Pedro C. Diniz (PARMA-DITAM@HiPEAC, 2014)

High-Level Synthesis from C vs. a DSL-Based Approach. - Cristiano Bacelar de Oliveira; João M. P. Cardoso; Eduardo Marques (IPDPS Workshops, 2014)

Trace-Based Reconfigurable Acceleration with Data Cache and External Memory Support. - Nuno Miguel Cardanha Paulino; João Canas Ferreira; João Manuel Paiva Cardoso (ISPA, 2014)

Exploration of compiler optimization sequences using clustering-based selection. - Luiz G. A. Martins; Ricardo Nobre; Alexandre C. B. Delbem; Eduardo Marques; João M. P. Cardoso (LCTES, 2014)

Multi-Target C Code Generation from MATLAB. - João Bispo; Luís Reis 001; João M. P. Cardoso (ARRAY@PLDI, 2014)

Representation of Evolutionary Algorithms in FPGA Cluster for Project of Large-Scale Networks. - André Bannwart Perina; Marcilyanne Moreira Gois; Paulo Matias; João M. P. Cardoso; Alexandre C. B. Delbem; Vanderlei Bonato (CoRR, 2014)

Specifying Dynamic Adaptations for Embedded Applications Using a DSL. - André C. Santos; João M. P. Cardoso; Pedro C. Diniz; Diogo R. Ferreira; Zlatko Petrov (IEEE Embed. Syst. Lett., 2014)

Practical Education Fostered by Research Projects in an Embedded Systems Course. - Vanderlei Bonato; Marcio Merino Fernandes; João M. P. Cardoso; Eduardo Marques (Int. J. Reconfigurable Comput., 2014)

A DSL for specifying run-time adaptations for embedded systems: an application to vehicle stereo navigation. - André C. Santos; João M. P. Cardoso; Pedro C. Diniz; Diogo R. Ferreira; Zlatko Petrov (J. Supercomput., 2014)

ANTAREX - AutoTuning and Adaptivity appRoach for Energy Efficient eXascale HPC Systems. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Beccari; Luca Benini; João M. P. Cardoso; Carlo Cavazzoni; Radim Cmar; Jan Martinovic; Gianluca Palermo; Martin Palkovic; Erven Rohou; et al. (CSE, 2015)

Transparent acceleration of program execution using reconfigurable hardware. - Nuno Miguel Cardanha Paulino; João Canas Ferreira; João Bispo; João M. P. Cardoso (DATE, 2015)

A special-purpose language for implementing pipelined FPGA-based accelerators. - Cristiano Bacelar de Oliveira; Ricardo Menotti; João M. P. Cardoso; Eduardo Marques (FDL, 2015)

Significant papers from the first 25 years of the FPL conference. - Philip Heng Wai Leong; Hideharu Amano; Jason Helge Anderson; Koen Bertels; João M. P. Cardoso; Oliver Diessel; Guy Gogniat; Mike Hutton; JunKyu Lee; Wayne Luk; Patrick Lysaght; Marco Platzner; et al. (FPL, 2015)

Reducing misses to external memory accesses in task-level pipelining. - Ali Azarian; João M. P. Cardoso (ISCAS, 2015)

Techniques for efficient MATLAB-to-C compilation. - João Bispo; Luís Reis 001; João M. P. Cardoso (ARRAY@PLDI, 2015)

C and OpenCL generation from MATLAB. - João Bispo; Luís Reis 001; João M. P. Cardoso (SAC, 2015)

Programming Strategies for Contextual Runtime Specialization. - Tiago Carvalho 001; Pedro Pinto 002; João M. P. Cardoso (SCOPES, 2015)

Use of Previously Acquired Positioning of Optimizations for Phase Ordering Exploration. - Ricardo Nobre; Luiz G. A. Martins; João M. P. Cardoso (SCOPES, 2015)

Fault Detection in C Programs using Monitoring of Range Values: Preliminary Results. - Pedro Pinto 002; Rui Abreu 001; João M. P. Cardoso (CoRR, 2015)

Enabling FPGA routing configuration sharing in dynamic partial reconfiguration. - Brahim Al Farisi; Karel Heyse; Karel Bruneel; João M. P. Cardoso; Dirk Stroobandt (Des. Autom. Embed. Syst., 2015)

Guest Editorial FPL 2013. - João M. P. Cardoso; Pedro C. Diniz; Katherine (Compton) Morrow (ACM Trans. Reconfigurable Technol. Syst., 2015)

Guest Editorial ARC 2014. - Diana Goehringer; Marco D. Santambrogio; João M. P. Cardoso; Koen Bertels (ACM Trans. Reconfigurable Technol. Syst., 2015)

A Reconfigurable Architecture for Binary Acceleration of Loops with Memory Accesses. - Nuno Miguel Cardanha Paulino; João Canas Ferreira; João M. P. Cardoso (ACM Trans. Reconfigurable Technol. Syst., 2015)

High-Level Synthesis. - João M. P. Cardoso; Markus Weinhardt (FPGAs for Software Programmers, 2016)

The ANTAREX approach to autotuning and adaptivity for energy efficient HPC systems. - Cristina Silvano; Giovanni Agosta; Stefano Cherubin; Davide Gadioli; Gianluca Palermo; Andrea Bartolini; Luca Benini; Jan Martinovic; Martin Palkovic; Katerina Slaninová; João Bispo; João M. P. Cardoso; et al. (Conf. Computing Frontiers, 2016)

A pipelined multi-softcore approach for the HOG algorithm. - José Arnaldo Mascagni de Holanda; João Manuel Paiva Cardoso; Eduardo Marques (DASIP, 2016)

Autotuning and adaptivity approach for energy efficient Exascale HPC systems: The ANTAREX approach. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Jan Martinovic; Gianluca Palermo; Martin Palkovic; et al. (DATE, 2016)

Towards a multi-softcore FPGA approach for the HOG algorithm. - José Arnaldo Mascagni de Holanda; João Manuel Paiva Cardoso; Eduardo Marques (INDIN, 2016)

A graph-based iterative compiler pass selection and phase ordering approach. - Ricardo Nobre; Luiz G. A. Martins; João M. P. Cardoso (LCTES, 2016)

SSA-based MATLAB-to-C compilation and optimization. - Luís Reis 001; João Bispo; João M. P. Cardoso (ARRAY@PLDI, 2016)

Pipelining data-dependent tasks in FPGA-based multicore architectures. - Ali Azarian; João M. P. Cardoso (Microprocess. Microsystems, 2016)

Performance-driven instrumentation and mapping strategies using the LARA aspect-oriented programming approach. - João M. P. Cardoso; José Gabriel F. Coutinho; Tiago Carvalho 001; Pedro C. Diniz; Zlatko Petrov; Wayne Luk; Fernando M. Gonçalves (Softw. Pract. Exp., 2016)

Clustering-Based Selection for the Exploration of Compiler Optimization Sequences. - Luiz G. A. Martins; Ricardo Nobre; João M. P. Cardoso; Alexandre C. B. Delbem; Eduardo Marques (ACM Trans. Archit. Code Optim., 2016)

Expressing and Applying C++ Code Transformations for the HDF5 API Through a DSL. - Martin Golasowski; João Bispo; Jan Martinovic; Katerina Slaninová; João M. P. Cardoso (CISIM, 2017)

Toward a Token-Based Approach to Concern Detection in MATLAB Sources. - Miguel P. Monteiro 001; Nuno C. Marques; Bruno Silva 003; Bruno Palma; João M. P. Cardoso (EPIA, 2017)

Impact of Compiler Phase Ordering When Targeting GPUs. - Ricardo Nobre; Luís Reis 001; João M. P. Cardoso (Euro-Par Workshops, 2017)

Compiler Techniques for Efficient MATLAB to OpenCL Code Generation. - Luís Reis 001; João Bispo; João M. P. Cardoso (IWOCL, 2017)

On Coding Techniques for Targeting FPGAs via OpenCL. - Nuno Paulino 001; Luís Reis 001; João M. P. Cardoso (PARCO, 2017)

LARA as a language-independent aspect-oriented programming approach. - Pedro Pinto 002; Tiago Carvalho 001; João Bispo; João M. P. Cardoso (SAC, 2017)

The ANTAREX tool flow for monitoring and autotuning energy efficient HPC systems. - Cristina Silvano; Giovanni Agosta; Jorge G. Barbosa; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; João Bispo; João M. P. Cardoso; Carlo Cavazzoni; Stefano Cherubin; Radim Cmar; Davide Gadioli; et al. (SAMOS, 2017)

Foreword to the special issue of the 18th IEEE international conference on computational science and engineering (CSE2015). - Christian Plessl; Guojing Cong; João M. P. Cardoso (Concurr. Comput. Pract. Exp., 2017)

Recent advances in computational science and engineering research. - Luís Veiga; Didier El Baz; João M. P. Cardoso (J. Comput. Sci., 2017)

Special issue on design of algorithms and architectures for signal and image processing. - Marek Gorgon; João M. P. Cardoso; Diana Göhringer; Leandro Soares Indrusiak (J. Syst. Archit., 2017)

Introduction to the special issue on architecture of computing systems. - Frank Hannig; João M. P. Cardoso; Dietmar Fey (J. Syst. Archit., 2017)

A MATLAB subset to C compiler targeting embedded systems. - João Bispo; João M. P. Cardoso (Softw. Pract. Exp., 2017)

Introduction to the Special Section on FPL 2015. - João M. P. Cardoso; Cristina Silvano (ACM Trans. Reconfigurable Technol. Syst., 2017)

The First 25 Years of the FPL Conference: Significant Papers. - Philip Heng Wai Leong; Hideharu Amano; Jason Helge Anderson; Koen Bertels; João M. P. Cardoso; Oliver Diessel; Guy Gogniat; Mike Hutton; JunKyu Lee; Wayne Luk; Patrick Lysaght; Marco Platzner; et al. (ACM Trans. Reconfigurable Technol. Syst., 2017)

Generation of Customized Accelerators for Loop Pipelining of Binary Instruction Traces. - Nuno Miguel Cardanha Paulino; João Canas Ferreira; João M. P. Cardoso (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Foreword to the Special Section on Reconfigurable Computing. - Steven Derrien; Kubilay Atasu; João M. P. Cardoso; Jürgen Becker 001 (J. Signal Process. Syst., 2017)

Rapid Prototyping and Verification of Hardware Modules Generated Using HLS. - Julián Caba; João M. P. Cardoso; Fernando Rincón; Julio Dondo; Juan Carlos López 001 (ARC, 2018)

Autotuning and adaptivity in energy efficient HPC systems: the ANTAREX toolbox. - Cristina Silvano; Gianluca Palermo; Giovanni Agosta; Amir H. Ashouri; Davide Gadioli; Stefano Cherubin; Emanuele Vitali; Luca Benini; Andrea Bartolini; Daniele Cesarini; João M. P. Cardoso; João Bispo; et al. (CF, 2018)

SOCRATES - A seamless online compiler and system runtime autotuning framework for energy-aware applications. - Davide Gadioli; Ricardo Nobre; Pedro Pinto 002; Emanuele Vitali; Amir H. Ashouri; Gianluca Palermo; João M. P. Cardoso; Cristina Silvano (DATE, 2018)

ANTAREX: A DSL-Based Approach to Adaptively Optimizing and Enforcing Extra-Functional Properties in High Performance Computing. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; Loïc Besnard; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Stefano Cherubin; Davide Gadioli; et al. (DSD, 2018)

Fast Heuristic-Based GPU Compiler Sequence Specialization. - Ricardo Nobre; Luís Reis 001; João M. P. Cardoso (Euro-Par Workshops, 2018)

AutoPar-Clava: An Automatic Parallelization source-to-source tool for C code applications. - Hamid Arabnejad; João Bispo; Jorge G. Barbosa; João M. P. Cardoso (PARMA-DITAM@HiPEAC, 2018)

Aspect-Driven Mixed-Precision Tuning Targeting GPUs. - Ricardo Nobre; Luís Reis 001; João Bispo; Tiago Carvalho 001; João M. P. Cardoso; Stefano Cherubin; Giovanni Agosta (PARMA-DITAM@HiPEAC, 2018)

Impact of Vectorization Over 16-bit Data-Types on GPUs. - Luís Reis 001; Ricardo Nobre; João M. P. Cardoso (PARMA-DITAM@HiPEAC, 2018)

An OpenMP Based Parallelization Compiler for C Applications. - Hamid Arabnejad; João Bispo; Jorge G. Barbosa; João M. P. Cardoso (ISPA/IUCC/BDCloud/SocialCom/SustainCom, 2018)

An approach based on a DSL + API for programming runtime adaptivity and autotuning concerns. - Tiago Carvalho 001; João M. P. Cardoso (SAC, 2018)

Formal verification of a domain specific language for run-time adaptation. - Shahid Khan 002; Faiq Khalid; Osman Hasan; João M. P. Cardoso (SysCon, 2018)

Aspect composition for multiple target languages using LARA. - Pedro Pinto 002; Tiago Carvalho 001; João Bispo; Miguel António Ramalho; João M. P. Cardoso (Comput. Lang. Syst. Struct., 2018)

Compiler Phase Ordering as an Orthogonal Approach for Reducing Energy Consumption. - Ricardo Nobre; Luís Reis 001; João M. P. Cardoso (CoRR, 2018)

Improving OpenCL Performance by Specializing Compiler Phase Selection and Ordering. - Ricardo Nobre; Luís Reis 001; João M. P. Cardoso (CoRR, 2018)

A Preliminary Study on Hyperparameter Configuration for Human Activity Recognition. - Kemilly Dearo Garcia; Tiago Carvalho 001; João Mendes-Moreira 001; João M. P. Cardoso; André C. P. L. F. de Carvalho (CoRR, 2018)

Graph-Based Code Restructuring Targeting HLS for FPGAs. - Afonso Canas Ferreira; João M. P. Cardoso (ARC, 2019)

Automatic Switching Between Video and Audio According to User's Context. - Paulo J. S. Ferreira; João M. P. Cardoso; João Mendes-Moreira 001 (EPIA (2), 2019)

Energy Efficient Smartphone-Based Users Activity Classification. - Ricardo M. C. Magalhães; João M. P. Cardoso; João Mendes-Moreira 001 (EPIA (2), 2019)

An Efficient Scheme for Prototyping kNN in the Context of Real-Time Human Activity Recognition. - Paulo J. S. Ferreira; Ricardo M. C. Magalhães; Kemilly Dearo Garcia; João M. P. Cardoso; João Mendes-Moreira 001 (IDEAL (1), 2019)

Supporting the Scale-Up of High Performance Application to Pre-Exascale Systems: The ANTAREX Approach. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; Loïc Besnard; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Daniele Cesarini; Stefano Cherubin; et al. (PDP, 2019)

A Study on Hyperparameter Configuration for Human Activity Recognition. - Kemilly Dearo Garcia; Tiago Carvalho 001; João Mendes-Moreira 001; João M. P. Cardoso; André C. P. L. F. de Carvalho (SOCO, 2019)

The ANTAREX Domain Specific Language for High Performance Computing. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; Loïc Besnard; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Daniele Cesarini; Stefano Cherubin; et al. (CoRR, 2019)

The ANTAREX domain specific language for high performance computing. - Cristina Silvano; Giovanni Agosta; Andrea Bartolini; Andrea Rosario Beccari; Luca Benini; Loïc Besnard; João Bispo; Radim Cmar; João M. P. Cardoso; Carlo Cavazzoni; Daniele Cesarini; Stefano Cherubin; et al. (Microprocess. Microsystems, 2019)

A framework for automatic and parameterizable memoization. - Loïc Besnard; Pedro Pinto 002; Imane Lasri; João Bispo; Erven Rohou; João M. P. Cardoso (SoftwareX, 2019)

Nonio - modular automatic compiler phase selection and ordering specialization framework for modern compilers. - Ricardo Nobre; João Bispo; Tiago Carvalho 001; João M. P. Cardoso (SoftwareX, 2019)

Dynamic Partial Reconfiguration of Customized Single-Row Accelerators. - Nuno Miguel Cardanha Paulino; João Canas Ferreira; João M. P. Cardoso (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Executing ARMv8 Loop Traces on Reconfigurable Accelerator via Binary Translation Framework. - Nuno Paulino 001; João Canas Ferreira; João Bispo; João M. P. Cardoso (FPL, 2020)

Automatic Selection and Insertion of HLS Directives Via a Source-to-Source Compiler. - Tiago Santos; João M. P. Cardoso (FPT, 2020)

Optimizing OpenCL Code for Performance on FPGA: k-Means Case Study With Integer Data Sets. - Nuno Paulino 001; João Canas Ferreira; João M. P. Cardoso (IEEE Access, 2020)

kNN Prototyping Schemes for Embedded Human Activity Recognition with Online Learning. - Paulo J. S. Ferreira; João M. P. Cardoso; João Mendes-Moreira 001 (Comput., 2020)

Compilation of MATLAB computations to CPU/GPU via C/OpenCL generation. - Luís Reis 001; João Bispo; João M. P. Cardoso (Concurr. Comput. Pract. Exp., 2020)

Clava: C/C++ source-to-source compilation using LARA. - João Bispo; João M. P. Cardoso (SoftwareX, 2020)

Source-to-source compilation targeting OpenMP-based automatic parallelization of C applications. - Hamid Arabnejad; João Bispo; João M. P. Cardoso; Jorge G. Barbosa (J. Supercomput., 2020)

A methodology and framework for software memoization of functions. - Pedro Pinto 002; João M. P. Cardoso (CF, 2021)

On the Performance Effect of Loop Trace Window Size on Scheduling for Configurable Coarse Grain Loop Accelerators. - Tiago Santos; Nuno Paulino 001; João Bispo; João M. P. Cardoso; João Canas Ferreira (FPT, 2021)

On Data Parallelism Code Restructuring for HLS Targeting FPGAs. - Renato Campos; João M. P. Cardoso (IPDPS Workshops, 2021)

Improving Performance and Energy Consumption in Embedded Systems via Binary Acceleration: A Survey. - Nuno Paulino 001; João Canas Ferreira; João M. P. Cardoso (ACM Comput. Surv., 2021)

An ensemble of autonomous auto-encoders for human activity recognition. - Kemilly Dearo Garcia; Cláudio Rebelo de Sá; Mannes Poel; Tiago Carvalho 001; João Mendes-Moreira 001; João M. P. Cardoso; André C. P. L. F. de Carvalho; Joost N. Kok (Neurocomputing, 2021)

A Binary Translation Framework for Automated Hardware Generation. - Nuno Paulino 001; João Bispo; João Canas Ferreira; João M. P. Cardoso (IEEE Micro, 2021)

Formal verification of Matrix based MATLAB models using interactive theorem proving. - Ayesha Gauhar; Adnan Rashid; Osman Hasan; João Bispo; João M. P. Cardoso (PeerJ Comput. Sci., 2021)

Guest Editorial: IEEE TC Special Section on Compiler Optimizations for FPGA-Based Systems. - João M. P. Cardoso; André DeHon; Laura Pozzi 001 (IEEE Trans. Computers, 2021)

An Efficient Monte Carlo-Based Probabilistic Time-Dependent Routing Calculation Targeting a Server-Side Car Navigation System. - Emanuele Vitali; Davide Gadioli; Gianluca Palermo; Martin Golasowski; João Bispo; Pedro Pinto 002; Jan Martinovic; Katerina Slaninová; João M. P. Cardoso; Cristina Silvano (IEEE Trans. Emerg. Top. Comput., 2021)

Pegasus: Performance Engineering for Software Applications Targeting HPC Systems. - Pedro Pinto 002; João Bispo; João M. P. Cardoso; Jorge G. Barbosa; Davide Gadioli; Gianluca Palermo; Jan Martinovic; Martin Golasowski; Katerina Slaninová; Radim Cmar; Cristina Silvano (IEEE Trans. Software Eng., 2022)

A CPU-FPGA Holistic Source-To-Source Compilation Approach for Partitioning and Optimizing C/C++ Applications. - Tiago Santos; João Bispo; João M. P. Cardoso (PACT, 2023)

Preface ASAP 2023. - João M. P. Cardoso; Alexandra Jimborean; Nele Mentens; José Gabriel F. Coutinho (ASAP, 2023)

A Study on Hyperparameters Configurations for an Efficient Human Activity Recognition System. - Paulo J. S. Ferreira; João Mendes Moreira 001; João M. P. Cardoso (iWOAR, 2023)

A DSL-based runtime adaptivity framework for Java. - Tiago Carvalho 001; João Bispo; Pedro Pinto 002; João M. P. Cardoso (SoftwareX, 2023)

A Flexible-Granularity Task Graph Representation and Its Generation from C Applications (WIP). - Tiago Santos; João Bispo; João M. P. Cardoso (LCTES, 2024)

A Fast and Energy-Efficient Method for Online and Incremental Pareto-Front Update. - Paulo J. S. Ferreira; João Mendes-Moreira 001; João M. P. Cardoso (WF-IoT, 2024)

First Twenty Years of the International Symposium on Applied Reconfigurable Computing (ARC): A Selection of Papers. - João M. P. Cardoso; Walid A. Najjar (ARC, 2025)

Ph.D. Project: Holistic Partitioning and Optimization of CPU-FPGA Applications Through Source-to-Source Compilation. - Tiago Santos; João Bispo; João M. P. Cardoso (FCCM, 2025)

On Improving the HLS Compatibility of Large C/C++ Code Regions. - Tiago Santos; João Bispo; João M. P. Cardoso; James C. Hoe (FCCM, 2025)