Power efficient architecture for motion estimation using the QSDS-DIC algorithm. - Marcelo Schiavon Porto; Sergio Bampi; João S. Altermann; Eduardo Costa 001 (ICECS, 2009)

Performance enhancement of H.264/AVC intra frame prediction hardware using efficient 4-2 and 5-2 adder-compressors. - Cláudio Machado Diniz; João S. Altermann; Eduardo A. C. da Costa; Sergio Bampi (SBCCI, 2010)

Fast forward and inverse transforms for the H.264/AVC standard using hierarchical adder compressors. - João S. Altermann; Eduardo A. C. da Costa; Sergio Bampi (VLSI-SoC, 2010)

High performance Haar Wavelet transform architecture. - João S. Altermann; Eduardo A. C. da Costa; Sérgio J. M. de Almeida (ECCTD, 2011)