A Prototype of a VHDL-Based Fault Injection Tool. - Juan Carlos Baraza; Joaquin Gracia; Daniel Gil; Pedro J. Gil (DFT, 2000)

A Study of the Effects of Transient Fault Injection into the VHDL Model of a Fault-Tolerant Microcomputer System. - Daniel Gil; Joaquin Gracia; Juan Carlos Baraza; Pedro J. Gil (IOLTW, 2000)

Comparison and Application of Different VHDL-Based Fault Injection Techniques. - Joaquin Gracia; Juan Carlos Baraza; Daniel Gil; Pedro J. Gil (DFT, 2001)

A Study of the Experimental Validation of Fault-Tolerant Systems Using Different VHDL-Based Fault Injection Techniques. - Joaquin Gracia; Juan Carlos Baraza; Daniel Gil; Pedro J. Gil (IOLTW, 2001)

A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques. - Sara Blanc; Joaquin Gracia; Pedro J. Gil (DFT, 2002)

Using VHDL-Based Fault Injection to exercise Error Detection Mechanisms in the Time-Triggered Architecture. - Joaquin Gracia; Daniel Gil; Juan Carlos Baraza; Pedro J. Gil (PRDC, 2002)

A prototype of a VHDL-based fault injection tool: description and application. - Juan Carlos Baraza; Joaquin Gracia; Daniel Gil; Pedro J. Gil (J. Syst. Archit., 2002)

Study, comparison and application of different VHDL-based fault injection techniques for the experimental validation of a fault-tolerant system. - Daniel Gil; Joaquin Gracia; Juan Carlos Baraza; Pedro J. Gil (Microelectron. J., 2003)

Experiences during the Experimental Validation of the Time-Triggered Architecture. - Sara Blanc; Joaquin Gracia; Pedro J. Gil (DATE, 2004)

Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques. - Daniel Gil; Joaquin Gracia; Juan Carlos Baraza; Pedro J. Gil (HLDVT, 2004)

Impact of Faults in Combinational Logic of Commercial Microcontrollers. - Daniel Gil; Joaquin Gracia; Juan Carlos Baraza; Pedro J. Gil (EDCC, 2005)

Improvement of fault injection techniques based on VHDL code modification. - Juan Carlos Baraza; Joaquin Gracia; Daniel Gil; Pedro J. Gil (HLDVT, 2005)

Analysis of the influence of intermittent faults in a microcontroller. - Joaquin Gracia; Luis J. Saiz; Juan Carlos Baraza; Daniel Gil; Pedro J. Gil (DDECS, 2008)

Injecting intermittent faults for the dependability validation of commercial microcontrollers. - Daniel Gil; Luis J. Saiz; Joaquin Gracia; Juan Carlos Baraza; Pedro J. Gil (HLDVT, 2008)

Enhancement of Fault Injection Techniques Based on the Modification of VHDL Code. - Juan Carlos Baraza; Joaquin Gracia; Sara Blanc; Daniel Gil; Pedro J. Gil (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Experimental validation of a fault tolerant microcomputer system against intermittent faults. - Joaquin Gracia-Moran; Daniel Gil-Tomas; Luis J. Saiz-Adalid; Juan Carlos Baraza; Pedro J. Gil-Vicente (DSN, 2010)

Searching Representative and Low Cost Fault Models for Intermittent Faults in Microcontrollers: A Case Study. - Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan Carlos Baraza; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (PRDC, 2010)

Analyzing the Impact of Intermittent Faults on Microprocessors Applying Fault Injection. - Daniel Gil-Tomas; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (IEEE Des. Test, 2012)

Studying the effects of intermittent faults on a microcontroller. - Daniel Gil-Tomas; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (Microelectron. Reliab., 2012)

Improving the Transfer of Safety and Security Competences to Industry: The RISKY Approach. - Joaquin Gracia-Moran; Juan-Carlos Ruiz-Garcia 001; Juan-Carlos Baraza-Calvo; David de Andrés; Pedro J. Gil (EWDC, 2013)

Using Interleaving to Avoid the Effects of Multiple Adjacent Faults in On-Chip Interconnection Lines. - Luis J. Saiz-Adalid; Pedro J. Gil; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo (EWDC, 2013)

Defining a Representative and Low Cost Fault Model Set for Intermittent Faults in Microprocessor Buses. - Joaquin Gracia-Moran; Daniel Gil-Tomas; Luis J. Saiz-Adalid; Juan-Carlos Baraza-Calvo; Pedro J. Gil-Vicente (LADC, 2013)

Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels. - Luis J. Saiz-Adalid; Pedro J. Gil-Vicente; Juan-Carlos Ruiz-Garcia 001; Daniel Gil-Tomas; Juan Carlos Baraza; Joaquin Gracia-Moran (SAFECOMP, 2013)

Modified Hamming Codes to Enhance Short Burst Error Detection in Semiconductor Memories (Short Paper). - Luis J. Saiz-Adalid; Pedro J. Gil; Juan-Carlos Baraza-Calvo; Juan-Carlos Ruiz-Garcia 001; Daniel Gil-Tomas; Joaquin Gracia-Moran (EDCC, 2014)

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor. - Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Daniel Gil-Tomas; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (IEEE Trans. Reliab., 2014)

Ultrafast Single Error Correction Codes for Protecting Processor Registers. - Luis J. Saiz-Adalid; Pedro J. Gil; Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan-Carlos Baraza-Calvo (EDCC, 2015)

How do new visual immersive systems influence gaming QoE? A use case of serious gaming with Oculus Rift. - Isabelle Hupont; Joaquin Gracia; Luis Miguel Sanagustín; Miguel Angel Gracia (QoMEX, 2015)

Ultrafast Error Correction Codes for Double Error Detection/Correction. - Luis J. Saiz-Adalid; Pedro J. Gil; Juan Carlos Ruiz 001; Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan-Carlos Baraza-Calvo (EDCC, 2016)

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System. - Daniel Gil-Tomas; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Luis J. Saiz-Adalid; Pedro J. Gil-Vicente (IEEE Trans. Reliab., 2016)

Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes. - Joaquin Gracia-Moran; Luis J. Saiz-Adalid; Juan-Carlos Baraza-Calvo; Pedro J. Gil (LADC, 2018)

Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications. - Joaquin Gracia-Moran; Luis J. Saiz-Adalid; Daniel Gil-Tomas; Pedro J. Gil-Vicente (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Ultrafast Codes for Multiple Adjacent Error Correction and Double Error Detection. - Luis J. Saiz-Adalid; Joaquin Gracia-Moran; Daniel Gil-Tomas; Juan-Carlos Baraza-Calvo; Pedro J. Gil-Vicente (IEEE Access, 2019)

Zero-Space In-Weight and In-Bias Protection for Floating-Point-based CNNs. - Juan Carlos Ruiz 001; David de Andrés; Luis J. Saiz-Adalid; Joaquin Gracia-Moran (EDCC, 2024)

Allocating ECC parity bits into BF16-encoded CNN parameters: A practical experience report. - Joaquin Gracia-Moran; Juan Carlos Ruiz 001; David de Andrés; Luis J. Saiz-Adalid (LADC, 2024)

In-Memory Zero-Space Floating-Point-Based CNN Protection Using Non-significant and Invariant Bits. - Juan Carlos Ruiz 001; David de Andrés; Luis J. Saiz-Adalid; Joaquin Gracia-Moran (SAFECOMP, 2024)

A Hybrid Technique Based on ECC and Hardened Cells for Tolerating Random Multiple-Bit Upsets in SRAM Arrays. - Daniel Gil-Tomas; Luis J. Saiz-Adalid; Joaquin Gracia-Moran; Juan-Carlos Baraza-Calvo; Pedro J. Gil-Vicente (IEEE Access, 2024)

Initial Insights into Synthesis Overheads Caused by C-Based Error Correction Codes Implementations. - Joaquin Gracia-Moran; David de Andrés; Luis J. Saiz-Adalid; Juan Carlos Ruiz 001; Juan-Carlos Baraza-Calvo; Daniel Gil-Tomas; Pedro J. Gil-Vicente (EDCC-C, 2025)

Towards SW-Based Robustness Assessment of HW Accelerators for Quantized CNNs. - Juan Carlos Ruiz 001; David de Andrés; Luis J. Saiz-Adalid; Joaquin Gracia-Moran (EDCC-C, 2025)

Towards a Novel 8-Bit Floating-Point Format to Increase Robustness in Convolutional Neural Networks. - Luis J. Saiz-Adalid; Juan-Carlos Ruiz-Garcia 001; Joaquin Gracia-Moran; David de Andrés; Juan-Carlos Baraza-Calvo; Daniel Gil-Tomas; Pedro J. Gil-Vicente (EDCC-C, 2025)

Can C-Based ECC Models Leverage High-Level Synthesis? Evaluating Description Variants for Efficient Circuit Implementations. - Joaquin Gracia-Moran; Juan-Carlos Ruiz-Garcia 001; David de Andrés; Luis J. Saiz-Adalid (SAFECOMP, 2025)