VLSI components for a 560-Mbit/s HDTV codec. - Klaus Grüger; Peter Pirsch; Josef Kraus; Jochen Reimers (VCIP, 1990)

Realization of a real time phasecorrelation chipset used in a hierarchical two step HDTV motion vector estimator. - K. Müller; Frank Schirrmeister; Christian von Reventlow; Dirk Siebert; Jochen Reimers; C. Stoffers (ASAP, 1993)

A VLSI chip set for DPCM coding of HDTV signals. - Josef Kraus; Jochen Reimers; Klaus Grüger (IEEE Trans. Circuits Syst. Video Technol., 1993)

Architecture and Memory Requirements for Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Synchronous DRAMs. - Marco Winzker; Peter Pirsch; Jochen Reimers (ISCAS, 1995)