An Analysis of FV Parameters Impact Towards its Hardware Acceleration. - Joël Cathébras; Alexandre Carbon; Renaud Sirdey; Nicolas Ventroux (IACR Cryptol. ePrint Arch., 2017)

Data Flow Oriented Hardware Design of RNS-based Polynomial Multiplication for SHE Acceleration. - Joël Cathébras; Alexandre Carbon; Peter A. Milder; Renaud Sirdey; Nicolas Ventroux (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2018)

Hardware Acceleration for Homomorphic Encryption. (Accélération matérielle pour la cryptographie homomorphe). - Joël Cathébras (2018)

A HDL Generator for Flexible and Efficient Finite-Field Multipliers on FPGAs. - Joël Cathébras; Roselyne Chotin (WAIFI, 2020)