Johan Vergauwen

According to our database1, Johan Vergauwen authored at least 11 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2022
A 96.9-dB-Resolution 109-μW Second-Order Robust Closed-Loop VCO-Based Sensor Interface for Multiplexed Single-Ended Resistance Readout in 180-nm CMOS.
IEEE J. Solid State Circuits, 2022

2020
A 16.1-bit Resolution 0.064-mm<sup>2</sup> Compact Highly Digital Closed-Loop Single-VCO-Based 1-1 Sturdy-MASH Resistance-to-Digital Converter With High Robustness in 180-nm CMOS.
IEEE J. Solid State Circuits, 2020

Improving the EMI Robustness of Feedback-based Time-Encoding Readout Architectures for Resistive Sensor Interfaces.
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020

2019
Performance Limitation Analysis of Highly-Digital Time-Based Closed-Loop Sensor-to-Digital Converter Architectures.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

A Robust BBPLL-Based 0.18- $\mu$ m CMOS Resistive Sensor Interface With High Drift Resilience Over a -40 °C-175 °C Temperature Range.
IEEE J. Solid State Circuits, 2019

Architectural Analysis of a Novel Closed-Loop VCO-Based 1-1 Sturdy MASH Sensor-to-Digital Converter.
Proceedings of the 16th International Conference on Synthesis, 2019

From Open-Loop to Closed-Loop Single-VCO-Based Sensor-to-Digital Converter Architectures: theoretical analysis and comparison.
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019

A 16.1-b ENOB 0.064mm<sup>2</sup> Compact Highly-Digital Closed-Loop Single-VCO-based 1-1 SMASH Resistance-to-Digital Converter in 180nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019

2018
Controlled-Oscillator Optimization for Highly-Digital CMOS Time-Based Sensor-to-Digital Converter Architectures.
Proceedings of the 15th International Conference on Synthesis, 2018

A Single-Temperature-Calibration 0.18-µm CMOS Time-Based Resistive Sensor Interface with Low Drift over a -40°C to 175°C Temperature Range.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017
Analysis and modeling of drift-resilient time-based integrated resistive sensor interfaces.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017


  Loading...