Extraction of material parameters based on inverse modeling of three-dimensional interconnect fusing structures. - Stefan Holzer; Rainer Minixhofer; Clemens Heitzinger; Johannes Fellner; Tibor Grasser; Siegfried Selberherr (Microelectron. J., 2004)

A one time programming cell using more than two resistance levels of a polyfuse. - Johannes Fellner (CICC, 2005)

Design and measurements of low power 32-kHz oscillators and a test interface in 180-nm CMOS technology. - Ivan Kuljak; Ivan Tomic; Roman Bertolan; Josip Mikulic; Gregor Schatzberger; Johannes Fellner; Adrijan Baric (MIPRO, 2020)

Design of a tunable temperature coefficient voltage reference with low-dropout voltage regulator in 180-nm CMOS technology. - David Osmanovic; Ivan Skeledzija; Kresimir Spoljaric; Domagoj Tomic; Josip Mikulic; Gregor Schatzberger; Johannes Fellner; Adrijan Baric (MIPRO, 2020)

Programmable low-frequency divider in 180-nm CMOS technology. - Dubravko Tomic; Josip Mikulic; Gregor Schatzberger; Johannes Fellner; Adrijan Baric (MIPRO, 2020)

Automated testing of ARM Cortex based SoC with I3C interface and temperature sensor. - Mario Golubic; Jurica Kundrata; Ivan Skeledzija; Dimitri Ciaglia; Nicolas Pages; Johannes Fellner; Adrijan Baric (MIPRO, 2022)

Analysis of Wheatstone Bridge Sensitivity for Applications in Integrated Piezoresistive Stress Sensors. - Leo Gocan; Andro Zamboki; Josip Mikulic; Gregor Schatzberger; Johannes Fellner; Tomislav Markovic; Adrijan Baric (MIPRO, 2024)

Automated Optimal Resistance Measurement Method for Precision Resistor Stress Response Analysis. - Andro Zamboki; Leo Gocan; Josip Mikulic; Gregor Schatzberger; Johannes Fellner; Tomislav Markovic; Adrijan Baric (MIPRO, 2024)