Prototyping memristors in digital system with an FPGA-based testing environment. - Daniel Wust; Mehrdad Biglari; Johannes Knödtel; Marc Reichenbach; Christopher Söll; Dietmar Fey (PATMOS, 2017)

A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs. - Johannes Knödtel; Wolffhardt Schwabe; Tobias Lieske; Marc Reichenbach; Dietmar Fey (PATMOS, 2018)

A programmable ternary CPU using hybrid CMOS/memristor circuits. - Daniel Wust; Dietmar Fey; Johannes Knödtel (Int. J. Parallel Emergent Distributed Syst., 2018)

Simulating Memristive Systems in Mixed-Signal Mode using Commercial Design Tools. - Markus Fritscher; Johannes Knödtel; Marc Reichenbach; Dietmar Fey (ICECS, 2019)

A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories. - Johannes Knödtel; Markus Fritscher; Daniel Reiser; Dietmar Fey; Marco Breiling; Marc Reichenbach (MOCAST, 2020)

Simulating large neural networks embedding MLC RRAM as weight storage considering device variations. - Markus Fritscher; Johannes Knödtel; Daniel Reiser; Maen Mallah; Stefan Pechmann; Dietmar Fey; Marc Reichenbach (LASCAS, 2021)

Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks. - Markus Fritscher; Johannes Knödtel; Maen Mallah; Stefan Pechmann; Emilio Pérez-Bosch Quesada; Tommaso Rizzi; Christian Wenger; Marc Reichenbach (SAMOS, 2021)

RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems. - Marc Reichenbach; Johannes Knödtel; Sebastian Rachuj; Dietmar Fey (IEEE Access, 2021)

Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best? - Johannes Knödtel; Sebastian Rachuj; Marc Reichenbach (DSD, 2022)

TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs. - Johannes Knödtel; Hector Gerardo Muñoz Hernandez; Alexander Lehnert; Gia Bao Thieu; Sven Gesper; Guillermo Payá-Vayá; Marc Reichenbach (ARC, 2023)

Datapath Optimization for Embedded Signal Processing Architectures utilizing Design Space Exploration. - Johannes Knödtel; Marc Reichenbach (DroneSE/RAPIDO@HiPEAC, 2023)

Trusted Computing Architectures for IoT Devices. - An Braeken; Bruno da Silva 001; Laurent Segers; Johannes Knödtel; Marc Reichenbach; Cornelia Wulf; Sergio A. Pertuz 001; Diana Göhringer; Jo Vliegen; Md Masoom Rabbani; Nele Mentens (ARC, 2024)

HyRPF: Hybrid RRAM Prototyping on FPGA. - Daniel Reiser; Johannes Knödtel; Liliia Almeeva; Jianan Wen; Andrea Baroni; Milos Krstic; Marc Reichenbach (SAMOS, 2024)

Design and analysis of an adaptive radiation resilient RRAM subsystem for processing systems in satellites. - Daniel Reiser; Junchao Chen 001; Johannes Knödtel; Andrea Baroni; Milos Krstic; Marc Reichenbach (Des. Autom. Embed. Syst., 2024)

HeterogeneousRTOS: A CPU-FPGA Real-Time OS for Fault Tolerance on COTS at Near-Zero Timing Cost. - Francesco Ratti; Johannes Knödtel; Marc Reichenbach (ACM Trans. Embed. Comput. Syst., 2025)