SODAS and a methodology for system design. - David Lorge Parnas; John A. Darringer (AFIPS Fall Joint Computing Conference, 1967)

A language for the description of digital computer processors. - John A. Darringer (DAC, 1968)

Applications of Symbolic Execution to Program Testing. - John A. Darringer; James C. King (Computer, 1978)

The application of program verification techniques to hardware verification. - John A. Darringer (DAC, 1979)

A new look at logic synthesis. - John A. Darringer; William H. Joyner Jr. (DAC, 1980)

Logic Synthesis Through Local Transformations. - John A. Darringer; William H. Joyner Jr.; C. Leonard Berman; Louise Trevillyan (IBM J. Res. Dev., 1981)

Automated Logic Synthesis. - John A. Darringer (VLSI Engineering, 1984)

Production logic synthesis. - John A. Darringer; Daniel Brand; William H. Joyner Jr.; Louise Trevillyan; John V. Gerbi (ACM Conference on Computer Science, 1985)

Advanced Design Automation in Industry. - John A. Darringer (IFIP Congress, 1989)

Where in the World Should CAD Software be Made? (Panel Abstract). - John A. Darringer (DAC, 1993)

LSS: A system for production logic synthesis. - John A. Darringer; Daniel Brand; John V. Gerbi; William H. Joyner Jr.; Louise Trevillyan (IBM J. Res. Dev., 2000)

EDA in IBM: past, present, and future. - John A. Darringer; Evan E. Davidson; David J. Hathaway; Bernd Koenemann; Mark A. Lavin; Joseph K. Morrell; Khalid Rahmat; Wolfgang Roesner; Erich C. Schanzenbach; Gustavo E. Téllez; Louise Trevillyan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Panel: What Drives EDA Innovation? - Steven E. Schulz; Georgia Marszalek; Greg Hinckley; Gregory S. Spirakis; Karen Vahtra; John A. Darringer; J. George Janac; Handel H. Jones (DAC, 2001)

Early analysis tools for system-on-a-chip design. - John A. Darringer; Reinaldo A. Bergamaschi; Subhrajit Bhattacharya; Daniel Brand; Andreas Herkersdorf; Joseph K. Morrell; Indira Nair; Patricia Sagmeister; Youngsoo Shin (IBM J. Res. Dev., 2002)

SEAS: a system for early analysis of SoCs. - Reinaldo A. Bergamaschi; Youngsoo Shin; Nagu R. Dhanwada; Subhrajit Bhattacharya; William E. Dougherty; Indira Nair; John A. Darringer; Sarala Paliwal (CODES+ISSS, 2003)

Were the good old days all that good?: EDA then and now. - Shishpal Rawat; William H. Joyner Jr.; John A. Darringer; Daniel Gajski; Pat O. Pistilli; Hugo De Man; Carl Harris; James Solomon (DAC, 2004)

A Mask Reuse Methodology for Reducing System-on-a-Chip Cost. - Subhrajit Bhattacharya; John A. Darringer; Daniel L. Ostapko; Youngsoo Shin (ISQED, 2005)

From single core to multi-core: preparing for a new exponential. - Jeff Parkhurst; John A. Darringer; Bill Grundmann (ICCAD, 2006)

Performance modeling for early analysis of multi-core systems. - Reinaldo A. Bergamaschi; Indira Nair; Gero Dittmann; Hiren D. Patel; Geert Janssen; Nagu R. Dhanwada; Alper Buyuktosunoglu; Emrah Acar; Gi-Joon Nam; Dorothy Kucar; Pradip Bose; John A. Darringer; et al. (CODES+ISSS, 2007)

Multi-Core Design Automation Challenges. - John A. Darringer (DAC, 2007)

Exploring power management in multi-core systems. - Reinaldo A. Bergamaschi; Guoling Han; Alper Buyuktosunoglu; Hiren D. Patel; Indira Nair; Gero Dittmann; Geert Janssen; Nagu R. Dhanwada; Zhigang Hu; Pradip Bose; John A. Darringer (ASP-DAC, 2008)

Thousand-Core Chips [Roundtable]. - David Yeh; Li-Shiuan Peh; Shekhar Borkar; John A. Darringer; Anant Agarwal; Wen-mei W. Hwu (IEEE Des. Test Comput., 2008)

Power-efficient, reliable microprocessor architectures: modeling and design methods. - Pradip Bose; Alper Buyuktosunoglu; Chen-Yong Cher; John A. Darringer; Meeta Sharma Gupta; Hendrik F. Hamann; Hans M. Jacobson; Prabhakar Kudva; Eren Kursun; Niti Madan; Indira Nair; Jude A. Rivers; et al. (ACM Great Lakes Symposium on VLSI, 2010)

Early chip planning cockpit. - Jeonghee Shin; John A. Darringer; Guojie Luo; Alan J. Weger; Charles L. Johnson (DATE, 2011)

Floorplanning challenges in early chip planning. - Jeonghee Shin; John A. Darringer; Guojie Luo; Merav Aharoni; Alexey Lvov; Gi-Joon Nam; Michael B. Healy (SoCC, 2011)

Power management of multi-core chips: Challenges and pitfalls. - Pradip Bose; Alper Buyuktosunoglu; John A. Darringer; Meeta Sharma Gupta; Michael B. Healy; Hans M. Jacobson; Indira Nair; Jude A. Rivers; Jeonghee Shin; Augusto Vega; Alan J. Weger (DATE, 2012)