Defining and Implementing a Multilevel Design Representation with Simulation Applications. - Donald E. Thomas; John A. Nestor (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1983)

DIF: A framework for VLSI multi-level representation. - David P. LaPotin; Sani R. Nassif; Jayanth V. Rajan; Michael L. Bushnell; John A. Nestor (Integr., 1984)

The System Architect's Workbench. - Donald E. Thomas; Elizabeth M. Dirkes; Robert A. Walker 001; Jayanth V. Rajan; John A. Nestor; Robert L. Blackburn (DAC, 1988)

MIES: a microarchitecture design tool. - John A. Nestor; Bassel Soudan; Zubair Mayet (MICRO, 1989)

Data Path Allocation using an Extended Binding Model. - Ganesh Krishnamoorthy; John A. Nestor (DAC, 1992)

SALSE II: A Fast Transformational Scheduler for High-level Synthesis. - Michael R. Rhinehart; John A. Nestor (ISCAS, 1993)

SALSA: a new approach to scheduling with timing constraints. - John A. Nestor; Ganesh Krishnamoorthy (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Visual register-transfer description of VLSI microarchitectures. - John A. Nestor (IEEE Trans. Very Large Scale Integr. Syst., 1993)

Web-Based Visualization Tools for Teaching VLSI CAD Algorithms. - John A. Nestor (MSE, 2001)

A new look at hardware maze routing. - John A. Nestor (ACM Great Lakes Symposium on VLSI, 2002)

FPGA Implementation of a Maze Routing Accelerator. - John A. Nestor (FPL, 2003)

Integrating Digital, Analog, and Mixed-Signal Design in an Undergraduate ECE Curriculum. - John A. Nestor; David A. Rich (MSE, 2003)

Teaching Computer Organization with HDLs: An Incremental Approach. - John A. Nestor (MSE, 2005)

L3: An FPGA-based multilayer maze routing accelerator. - John A. Nestor (Microprocess. Microsystems, 2005)

L4: An FPGA-Based Accelerator for Detailed Maze Routing. - John A. Nestor; Jeremy Lavine (FPL, 2007)

Experience With the CADAPPLETS Project. - John A. Nestor (IEEE Trans. Educ., 2008)

An FPGA-based wireless network capstone project. - John A. Nestor; Chris Nadovich (MSE, 2009)

VCache: visualization applet for processor caches. - Berkin Ilbeyi; John A. Nestor (ITiCSE, 2010)

An undergraduate embedded systems project. - John F. Greco; John A. Nestor (MSE, 2011)

HDL coding guidelines for student projects. - John A. Nestor (MSE, 2011)

From microelectronics to making: Incorporating microelectronics in a first-year engineering course. - John A. Nestor (MSE, 2017)

Experiences with Remote Teaching an Embedded Systems Course. - John A. Nestor (ACM Great Lakes Symposium on VLSI, 2021)