The testability features of the 3rd generation ColdFire family of microprocessors. - Alfred L. Crouch; Michael Mateja; Teresa L. McLaurin; John C. Potter; Dat Tran (ITC, 1999)

On-the-shelf core pattern methodology for ColdFire(R) microprocessor cores. - Teresa L. McLaurin; John C. Potter (ITC, 2000)

Test Development for a Third-Version ColdFire Microprocessor. - Alfred L. Crouch; Michael Mateja; Teresa L. McLaurin; John C. Potter; Dat Tran (IEEE Des. Test Comput., 2000)

AC Scan Path Selection for Physical Debugging. - Alfred L. Crouch; John C. Potter; Jason Doege (IEEE Des. Test Comput., 2003)

Don't forget to lock your SIB: Hiding instruments using P16871. - Jennifer Dworak; Al Crouch; John C. Potter; Adam Zygmontowicz; Micah Thornton (ITC, 2013)

FPGA-Based Embedded Tester with a P1687 Command, Control, and Observe-System. - Alfred L. Crouch; John C. Potter; Ajay Khoche; Jennifer Dworak (IEEE Des. Test, 2013)

Making it harder to unlock an LSIB: Honeytraps and misdirection in a P1687 network. - Adam Zygmontowicz; Jennifer Dworak; Al Crouch; John C. Potter (DATE, 2014)

Board security enhancement using new locking SIB-based architectures. - Jennifer Dworak; Zoe Conroy; Alfred L. Crouch; John C. Potter (ITC, 2014)

Invited - A box of dots: using scan-based path delay test for timing verification. - Alfred L. Crouch; John C. Potter (DAC, 2016)

Using Existing Reconfigurable Logic in 3D Die Stacks for Test. - Fanchen Zhang; Yi Sun; Xi Shen; Kundan Nepal; Jennifer Dworak; Theodore W. Manikas; Ping Gui; R. Iris Bahar; Al Crouch; John C. Potter (NATW, 2016)