Power-efficient layered turbo decoder processor. - John Dielissen; Jef L. van Meerbergen; Marco Bekooij; Françoise Harmsze; Sergej Sawitzki; Jos Huisken; Albert van der Werf (DATE, 2001)

Breaking an application specific instruction-set processor: the first step towards embedded software testing. - John Dielissen; Benito Otero Mathijssen; Jos Huisken (HLDVT, 2002)

Guaranteeing the Quality of Services in Networks on Chip. - Kees Goossens; John Dielissen; Jef L. van Meerbergen; Peter Poplavko; Andrei Radulescu; Edwin Rijpkema; Erwin Waterlander; Paul Wielage (Networks on Chip, 2003)

Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip. - Edwin Rijpkema; Kees G. W. Goossens; Andrei Radulescu; John Dielissen; Jef L. van Meerbergen; Paul Wielage; Erwin Waterlander (DATE, 2003)

Bringing communication networks on a chip: test and verification implications. - Bart Vermeulen; John Dielissen; Kees Goossens; Calin Ciordas (IEEE Commun. Mag., 2003)

A Scalable Architecture for LDPC Decodin. - Mauro Cocco; John Dielissen; Marc J. M. Heijligers; Andries Hekstra; Jos Huisken (DATE, 2004)

An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration. - Andrei Radulescu; John Dielissen; Kees Goossens; Edwin Rijpkema; Paul Wielage (DATE, 2004)

A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification. - Kees Goossens; John Dielissen; Om Prakash Gangwal; Santiago González Pestana; Andrei Radulescu; Edwin Rijpkema (DATE, 2005)

Æthereal Network on Chip: Concepts, Architectures, and Implementations. - Kees Goossens; John Dielissen; Andrei Radulescu (IEEE Des. Test Comput., 2005)

An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration. - Andrei Radulescu; John Dielissen; Santiago González Pestana; Om Prakash Gangwal; Edwin Rijpkema; Paul Wielage; Kees Goossens (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Low cost LDPC decoder for DVB-S2. - John Dielissen; Andries Hekstra; Vincent Berg (DATE Designers' Forum, 2006)

Non-fractional parallelism in LDPC decoder implementations. - John Dielissen; Andries Hekstra (DATE, 2007)

Multistandard FEC Decoders for Wireless Devices. - John Dielissen; Nur Engin; Sergei Sawitzki; Kees van Berkel 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2008)