Fast Spheres, Shadows, Textures, Transparencies, and Image Enhancements in Pixel-Planes. - Henry Fuchs; Jack Goldfeather; Jeff P. Hultquist; Susan Spach; John D. Austin; Frederick P. Brooks Jr.; John G. Eyles; John Poulton (Advances in Computer Graphics, 1985)

Fast spheres, shadows, textures, transparencies, and imgage enhancements in pixel-planes. - Henry Fuchs; Jack Goldfeather; Jeff P. Hultquist; Susan Spach; John D. Austin; Frederick P. Brooks Jr.; John G. Eyles; John Poulton (SIGGRAPH, 1985)

Pixel-Planes 4: A Summary. - John G. Eyles; John D. Austin; Henry Fuchs; Trey Greer; John Poulton (Advances in Computer Graphics Hardware, 1987)

Pixel-planes 5: a heterogeneous multiprocessor graphics system using processor-enhanced memories. - Henry Fuchs; John Poulton; John G. Eyles; Trey Greer; Jack Goldfeather; David A. Ellsworth; Steven Molnar; Greg Turk; Brice Tebbs; Laura Israel (SIGGRAPH, 1989)

PixelFlow: high-speed rendering using image composition. - Steven Molnar; John G. Eyles; John Poulton (SIGGRAPH, 1992)

Breaking the frame-buffer bottleneck with logic-enhanced memories. - John Poulton; John G. Eyles; Steven E. Molnar; Henry Fuchs (IEEE Computer Graphics and Applications, 1992)

PixelFlow: The Realization. - John G. Eyles; Steven Molnar; John Poulton; Trey Greer; Anselmo Lastra; Nick England; Lee Westover (Workshop on Graphics Hardware, 1997)

The WarpEngine: an architecture for the post-polygonal age. - Voicu Popescu; John G. Eyles; Anselmo Lastra; Joshua Steinhurst; Nick England; Lars S. Nyland (SIGGRAPH, 2000)

A 14mW 6.25Gb/s Transceiver in 90nm CMOS for Serial Chip-to-Chip Communications. - Robert Palmer; John Poulton; William J. Dally; John G. Eyles; Andrew M. Fuller; Trey Greer; Mark Horowitz; Mark Kellam; F. Quan; F. Zarkeshvari (ISSCC, 2007)

A 14-mW 6.25-Gb/s Transceiver in 90-nm CMOS. - John Poulton; Robert Palmer; Andrew M. Fuller; Trey Greer; John G. Eyles; William J. Dally; Mark Horowitz (IEEE J. Solid State Circuits, 2007)

A 4.3 GB/s Mobile Memory Interface With Power-Efficient Bandwidth Scaling. - Brian S. Leibowitz; Robert Palmer; John Poulton; Yohan Frans; Simon Li; John M. Wilson 002; Michael Bucher; Andrew M. Fuller; John G. Eyles; Marko Aleksic; Trey Greer; Nhat Nguyen (IEEE J. Solid State Circuits, 2010)

A 0.54pJ/b 20Gb/s ground-referenced single-ended short-haul serial link in 28nm CMOS for advanced packaging applications. - John W. Poulton; William J. Dally; Xi Chen 033; John G. Eyles; Thomas H. Greer; Stephen G. Tell; C. Thomas Gray (ISSCC, 2013)

A 0.54 pJ/b 20 Gb/s Ground-Referenced Single-Ended Short-Reach Serial Link in 28 nm CMOS for Advanced Packaging Applications. - John W. Poulton; William J. Dally; Xi Chen 033; John G. Eyles; Thomas H. Greer; Stephen G. Tell; John M. Wilson 002; C. Thomas Gray (IEEE J. Solid State Circuits, 2013)