CLANS: a high-level synthesis tool for high resolution data converters. - John G. Kenney; L. Richard Carley (ICCAD, 1988)

On-chip Tests for Gain Bandwidth Product and Slew Rate. - Kartahik Ramamurthy; John G. Kenney; Giri Rangan (ISCAS, 1993)

High Speed Buffers for Op-amp Characterization. - Giri Rangan; John G. Kenney; Karthik Ramamurthy; Gabor C. Temes (ISCAS, 1993)

An enhanced slew rate source follower. - John G. Kenney; Giri Rangan; Karthik Ramamurthy; Gabor C. Temes (IEEE J. Solid State Circuits, 1995)

A 9.95-11.3-Gb/s XFP Transceiver in 0.13-$ mu{ hbox {m}}$ CMOS. - John G. Kenney; Declan Dalton; Eric Evans; Murat Hayri Eskiyerli; Barry Hilton; Dave Hitchcox; Terence Kwok; Daniel Mulcahy; Chris McQuilkin; Viswabharath Reddy; Siva Selvanayagam; Paul Shepherd; et al. (IEEE J. Solid State Circuits, 2006)

A 5.6 GHz to 11.5 GHz DCO for Digital Dual Loop CDRs. - Ward S. Titus; John G. Kenney (IEEE J. Solid State Circuits, 2012)

A 12.5-Gb/s self-calibrating linear phase detector-based CDR using 0.18μm SiGe BiCMOS. - Jeremy Walker; John G. Kenney; Jesse Bankman; Terry Chen; Steve Harston; Kenneth Lawas; Andrew Lewine; Richard Soenneker; Michael St. Germain; Ward S. Titus; Andrew Y. Wang; Kimo Tam (CICC, 2014)