John Goodenough

Affiliations:
  • ARM, San Jose, CA, USA
  • ARM, Cambridge, UK
  • Univeristy of Sheffield, Department of Electronic & Electrical Engineering, UK


According to our database1, John Goodenough authored at least 8 papers between 1994 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

Online presence:

On csauthors.net:

Bibliography

2010
Post-silicon is too late avoiding the $50 million paperweight starts with validated designs.
Proceedings of the 47th Design Automation Conference, 2010

2008
Design Automation Standards: The IP Providers Perspective.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Panel: SoC power management implications on validation and testing.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2008

2007
IP Exchange: I'll Show You Mine if You Show Me Yours.
Proceedings of the 44th Design Automation Conference, 2007

2006
A 90-nm Power Optimization Methodology With Application to the ARM 1136JF-S Microprocessor.
IEEE J. Solid State Circuits, 2006

1995
A single chip video signal processing architecture for image processing, coding, and computer vision.
IEEE Trans. Circuits Syst. Video Technol., 1995

1994
HART, A Heterogeneous Architecture for Real-Time Prototyping, Development and Implementation of Machine Vision Applications.
Proceedings of the Proceedings 1994 International Conference on Image Processing, 1994

A General Purpose, Single Chip Video Signal Processing (VSP) Architecture for Image Processing, Coding and Computer Vision.
Proceedings of the Proceedings 1994 International Conference on Image Processing, 1994


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