A General Purpose, Single Chip Video Signal Processing (VSP) Architecture for Image Processing, Coding and Computer Vision. - John Goodenough 001; Richard J. Meacham; Jonathan D. Morris; Nicholas Luke Seed; Peter A. Ivey (ICIP (3), 1994)

HART, A Heterogeneous Architecture for Real-Time Prototyping, Development and Implementation of Machine Vision Applications. - John Goodenough 001; A. J. Shelley; Nicholas Luke Seed (ICIP (3), 1994)

A single chip video signal processing architecture for image processing, coding, and computer vision. - John Goodenough 001; Richard J. Meacham; Jonathan D. Morris; Nicholas Luke Seed; Peter A. Ivey (IEEE Trans. Circuits Syst. Video Technol., 1995)

A 90-nm Power Optimization Methodology With Application to the ARM 1136JF-S Microprocessor. - Aurangzeb Khan; Philip Watson; George Kuo; Due Le; Trung-Kien Nguyen; Steven Yang; Peter Bennett 002; Pokai Huang; Jaspal Gill; Chris Hawkins; John Goodenough 001; Demin Wang; et al. (IEEE J. Solid State Circuits, 2006)

IP Exchange: I'll Show You Mine if You Show Me Yours. - Lauren Sarno; Ron Wilson; Soo-Kwan Eo; Laurent Lestringand; John Goodenough 001; Guri Stark; Serge Leef; Dave Witt (DAC, 2007)

Panel: SoC power management implications on validation and testing. - Bhanu Kapoor; John Goodenough 001; Shankar Hemmady; Shireesh Verma; Manuel A. d'Abreu; Kaushik Roy 001 (HLDVT, 2008)

Design Automation Standards: The IP Providers Perspective. - John Goodenough 001 (VLSI Design, 2008)

Post-silicon is too late avoiding the $50 million paperweight starts with validated designs. - John Goodenough 001; Rob Aitken (DAC, 2010)