A chip-set for a high-speed low-cost floating-point unit. - J. B. Gosling; John H. Zurawski; David B. G. Edwards (IEEE Symposium on Computer Arithmetic, 1981)

Design of High-Speed Digital Divider Units. - John H. Zurawski; J. B. Gosling (IEEE Trans. Computers, 1981)

Design of a High-Speed Square Root Multiply and Divide Unit. - John H. Zurawski; J. B. Gosling (IEEE Trans. Computers, 1987)

The Design of the AlphaStation 800 5/300 Workstation. - John H. Zurawski; John E. Murray; Paul J. Lemmon (COMPCON, 1995)

The Design and Verification of the AlphaStation 600 5-series Workstation - John H. Zurawski; John E. Murray; Paul J. Lemmon (Digit. Tech. J., 1995)

Implementing Neon: a 256-bit graphics accelerator. - Joel McCormack; Bob McNamara; Chris Gianos; Norman P. Jouppi; Todd A. Dutton; John H. Zurawski; Larry Seiler; Kenneth W. Correll (IEEE Micro, 1999)