Measurement and modeling of small-geometry MOS transistor capacitances. - John J. Paulos (1984)

An analysis of sinusoidally excited delta-sigma modulators. - Sasan H. Ardalan; John J. Paulos (ICASSP, 1987)

A VLSI architecture for feedforward networks with integral back-propagation. - John J. Paulos; Paul W. Hollis (Neural Networks, 1988)

Switch-level simulation of total dose effects on CMOS VLSI circuits. - Bharat L. Bhuva; John J. Paulos; Ronald S. Gyurcsik; Sherra E. Kerns (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Low-voltage coefficient capacitors for VLSI processes. - David D. Slater; John J. Paulos (IEEE J. Solid State Circuits, 1989)

A custom microprocessor for implantable telemetry systems. - Todd A. Cook; Kenneth W. Fernald; Thomas K. Miller; John J. Paulos (CBMS, 1990)

The Effects of Precision Constraints in a Backpropagation Learning Network. - Paul W. Hollis; John S. Harper; John J. Paulos (Neural Comput., 1990)

Table-based modeling of delta-sigma modulators using ZSIM. - Gregory T. Brauns; R. J. Bishop; Michael Steer; John J. Paulos; Sasan H. Ardalan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Scalable VLSI implementations for neural networks. - David E. van den Bout; Paul D. Franzon; John J. Paulos; Thomas K. Miller III; Wesley E. Snyder; H. Troy Nagle; Wentai Liu (J. VLSI Signal Process., 1990)

Artificial neural networks using MOS analog multipliers. - Paul W. Hollis; John J. Paulos (IEEE J. Solid State Circuits, 1990)

A Microprocessor-Based Implantable Telemetry System. - Kenneth W. Fernald; Todd A. Cook; Thomas K. Miller III; John J. Paulos (Computer, 1991)

A self-tuning digital telemetry IC for use in a microprocessor-based implantable instrument. - Kenneth W. Fernald; John J. Paulos; Blaine A. Stackhouse; Robert A. Heaton (IEEE J. Solid State Circuits, 1992)

Interpolation of MOSFET table data in width, length, and temperature. - Mark G. Graham; John J. Paulos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Hierarchical yield estimation of large analog integrated circuits. - Chris M. Kurker; John J. Paulos; Ronald S. Gyurcsik; Jye-Chyi Lu (IEEE J. Solid State Circuits, 1993)

Building Blocks for a Temperature-Compensated Analog VLSI Neural Network with On-Chip Learning. - Antonio J. Montalvo; Ronald S. Gyurcsik; John J. Paulos (ISCAS, 1994)

A neural network learning algorithm tailored for VLSI implementation. - Paul W. Hollis; John J. Paulos (IEEE Trans. Neural Networks, 1994)

Template-based MOSFET device model. - Mark G. Graham; John J. Paulos; Douglas W. Nychka (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

An analog VLSI neural network with on-chip perturbation learning. - Antonio J. Montalvo; Ronald S. Gyurcsik; John J. Paulos (IEEE J. Solid State Circuits, 1997)

Toward a general-purpose analog VLSI neural network with on-chip learning. - Antonio J. Montalvo; Ronald S. Gyurcsik; John J. Paulos (IEEE Trans. Neural Networks, 1997)