Memory System for a Statically Scheduled Supercomputer. - Chandra S. Joshi; Brad A. Reger; John R. Feehrer (ICPP (1), 1991)

Timing uncertainty analysis for time-of-flight systems. - John R. Feehrer; Harry F. Jordan (ICCAD, 1994)

Design and Implementation of a Prototype Optical Deflection Network. - John R. Feehrer; Jon Sauer; Lars H. Ramfelt (SIGCOMM, 1994)

Packet Synchronization for Synchronous Optical Deflection-Routed Interconnection Networks. - John R. Feehrer; Lars H. Ramfelt (IEEE Trans. Parallel Distributed Syst., 1996)

Coherency Hub Design for Multi-Node Victoria Falls Server Systems. - John R. Feehrer; Paul Rotker; Milton Shih; Paul Gingras; Peter Yakutis; Stephen Phillips; John Heath; Sebastian Turullols (Hot Interconnects, 2008)

Coherency Hub Design for Multisocket Sun Servers with CoolThreads Technology. - John R. Feehrer; Paul Rotker; Milton Shih; Paul Gingras; Peter Yakutis; Stephen Phillips; John Heath (IEEE Micro, 2009)

The Oracle Sparc T5 16-Core Processor Scales to Eight Sockets. - John R. Feehrer; Sumti Jairath; Paul Loewenstein; Ram Sivaramakrishnan; David Smentek; Sebastian Turullols; Ali Vahidsafa (IEEE Micro, 2013)

Implementation and Modeling for High-performance I/O Hub Used in SPARC M7 Processor-Based Servers. - John R. Feehrer; Jeffry Hughes; Hugh Kurth; David Pabisz; Peter Yakutis (MCSoC, 2015)