A power-optimized widely-tunable 5-GHz monolithic VCO in a digital SOI CMOS technology on high resistivity substrate. - Jonghae Kim; Jean-Olivier Plouchart; Noah Zamdmer; Melanie Sherony; Yue Tan; Meeyoung Yoon; Robert Trzcinski; Mohamed Talbi; John Safran; Asit Ray; Lawrence F. Wagner (ISLPED, 2003)

Electrically Programmable Fuse (eFUSE): From Memory Redundancy to Autonomic Chips. - Norman Robson; John Safran; Chandrasekharan Kothandaraman; Alberto Cestero; Xiang Chen; Raj Rajeevakumar; Alan Leslie; Dan Moy; Toshiaki Kirihata; Subramanian S. Iyer (CICC, 2007)

A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45nm SOI CMOS. - Gregory Uhlmann; Tony Aipperspach; Toshiaki Kirihata; K. Chandrasekharan; Yan Zun Li; Chris Paone; Brian Reed; Norman Robson; John Safran; David Schmitt; Subramanian S. Iyer (ISSCC, 2008)

Field Tolerant Dynamic Intrinsic Chip ID Using 32 nm High-K/Metal Gate SOI Embedded DRAM. - Sami Rosenblatt; Daniel Fainstein; Alberto Cestero; John Safran; Norman Robson; Toshiaki Kirihata; Subramanian S. Iyer (IEEE J. Solid State Circuits, 2013)

Impact of 3D copper TSV integration on 32SOI FEOL and BEOL reliability. - Mukta G. Farooq; Giuseppe La Rosa; Fen Chen; Prakash Periasamy; Troy L. Graves-abe; Chandrasekharan Kothandaraman; C. Collins; W. Landers; J. Oakley; J. Liu; John Safran; S. Ghosh; et al. (IRPS, 2015)