The effect of varactor nonlinearity on the phase noise of completely integrated VCOs. - John W. M. Rogers; José Macedo; Calvin Plett (IEEE J. Solid State Circuits, 2000)

A completely integrated 2 GHz VCO with post-processed Cu inductors. - John W. M. Rogers; Vladislav Levenets; Chris A. Pawlowicz; N. Garry Tarr; Tom J. Smy; Calvin Plett (CICC, 2001)

A ΔΣ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications. - John W. M. Rogers; Mark S. Cavin; Fa Foster Dai; David G. Rahn (ESSCIRC, 2003)

A 5-GHz radio front-end with automatically Q-tuned notch filter and VCO. - John W. M. Rogers; Calvin Plett (IEEE J. Solid State Circuits, 2003)

A study of digital and analog automatic-amplitude control circuitry for voltage-controlled oscillators. - John W. M. Rogers; David G. Rahn; Calvin Plett (IEEE J. Solid State Circuits, 2003)

A 5 GHz direct-conversion receiver with DC offset correction. - Paul W. M. Laferriere; Dave Rahn; Calvin Plett; John W. M. Rogers (ISCAS (4), 2004)

A 15 GHz, 1.8V, variable-gain, modified Cherry-Hooper amplifier. - Justin P. Abbott; Calvin Plett; John W. M. Rogers (CICC, 2005)

A 1.2V CMOS multiplier for 10 Gbit/s equalization. - Justin P. Abbott; Calvin Plett; John W. M. Rogers (ESSCIRC, 2005)

A low voltage CMOS multiplier for high frequency equalization. - Justin P. Abbott; Calvin Plett; John W. M. Rogers (ISCAS (3), 2005)

A fully integrated multiband MIMO WLAN transceiver RFIC. - David G. Rahn; Mark S. Cavin; Fa Foster Dai; Neric H. W. Fong; Richard Griffith; José Macedo; A. David Moore; John W. M. Rogers; Mike Toner (IEEE J. Solid State Circuits, 2005)

A multiband ΔΣ fractional-N frequency synthesizer for a MIMO WLAN transceiver RFIC. - John W. M. Rogers; Foster F. Dai; Mark S. Cavin; David G. Rahn (IEEE J. Solid State Circuits, 2005)

Silicon Differential Antenna/Inductor for Short Range Wireless Communication Applications. - Atef Shamim; Peter H. R. Popplewell; Victor Karam; Langis Roy; John W. M. Rogers; Calvin Plett (CCECE, 2006)

A 0.13µm CMOS delay cell for 40 Gb/s FFE equalization. - Travis Lovitt; Calvin Plett; John W. M. Rogers (ISCAS, 2006)

5.2 GHz self-powered lock and roll radio using VCO injection-locking and on-chip antennas. - Peter H. R. Popplewell; Victor Karam; Atef Shamim; John W. M. Rogers; Mark Cloutier; Calvin Plett (ISCAS, 2006)

Design and Characterization of a 5.2 GHz/2.4 GHz ΣΔ Fractional-N Frequency Synthesizer for Low-Phase Noise Performance. - John W. M. Rogers; Foster F. Dai; Calvin Plett; Mark S. Cavin (EURASIP J. Wirel. Commun. Netw., 2006)

A 5.2-GHz BFSK Transceiver Using Injection-Locking and an On-Chip Antenna. - Peter H. R. Popplewell; Victor Karam; Atif Shamim; John W. M. Rogers; Langis Roy; Calvin Plett (IEEE J. Solid State Circuits, 2008)

Guest Editorial Special Section on 2009 IEEE Custom Integrated Circuits Conference. - Shahriar Mirabbasi; John W. M. Rogers; Gabriele Manganaro (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Highly reconfigurable single-ended low noise amplifier for software defined radio applications. - Richard Beare; Calvin Plett; John W. M. Rogers (NEWCAS, 2012)

Guest Editorial: Special Section on the 2012 IEEE Custom Integrated Circuits Conference (CICC 2012). - Shanthi Pavan; John W. M. Rogers; Vikas Chandra (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Guest Editorial - Special Section on the 2013 IEEE Custom Integrated Circuits Conference (CICC 2013). - José M. de la Rosa 001; John W. M. Rogers; Vikas Chandra (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A 0.009-1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching. - Jerry Lam; Tom A. D. Riley; Norman M. Filiol; John W. M. Rogers; Calvin Plett (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Optimization of EVM Through Diode Bias Control Using a Blind Algorithm Applied to Multiport Receivers. - Jose Augusto Lima; John W. M. Rogers; Rony E. Amaya (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Finding the Initial Estimate for the Diode Bias Point in Multiport Receivers. - Jose Augusto Lima; John W. M. Rogers; Rony E. Amaya (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A Highly Compact 2.4-GHz Passive 6-bit Phase Shifter With Ambidextrous Quadrant Selector. - Mackenzie Cook; John W. M. Rogers (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Analysis and Correction of Noise Injection Due to Parallel-Output-Misalignment (POM) Effects in Ring-Type Time-to-Digital Converters (TDCs). - Tuoxin Wang; John W. M. Rogers; Krste Mitric (IEEE J. Solid State Circuits, 2019)

Topographical Field Map Analysis Tool for Designing Linear LC DCOs. - Shakeeb Abdullah; John W. M. Rogers (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A 5.56 GHz Single Core Digitally-Controlled Oscillator With Direct Fine Tuning Steps of 2.85 kHz. - Shakeeb Abdullah; John W. M. Rogers; Rony E. Amaya (CCECE, 2022)

Using TFM Analysis and Memory Map Calibration for Designing Linear and Monotonic LC DCOs. - Shakeeb Abdullah; John W. M. Rogers; Rony E. Amaya (CCECE, 2022)

A 6 GHz Digitally-Controlled Oscillator Achieving Minimum Fine Tuning Step Size of Up to 160 Hz Using Capacitive Degeneration Technique in 40 nm CMOS Process. - Shakeeb Abdullah; John W. M. Rogers; Rony E. Amaya (ICM, 2022)

A 56 GHz InP VCO for Use in 112 GBaud (112 GBit/s NRZ or 224 GBit/s PAM-4) InP Integrated Optical Receiver Front-End CDR Block. - Shakeeb Abdullah; John W. M. Rogers; Wenyu Zhou; Rony E. Amaya (CCECE, 2023)