Configuration of VLSI Arrays in the Presence of Defects. - Jonathan W. Greene; Abbas El Gamal (J. ACM, 1984)

An architecture for electrically configurable gate arrays. - Abbas El Gamal; Jonathan W. Greene; Justin Reyneri; Eric Rogoyski; Khaled A. El-Ayat; Amr Mohsen (IEEE J. Solid State Circuits, 1989)

Segmented Channel Routing. - Jonathan W. Greene; Vwani P. Roychowdhury; Sinan Kaptanoglu; Abbas El Gamal (DAC, 1990)

Segmented channel routing. - Vwani P. Roychowdhury; Jonathan W. Greene; Abbas El Gamal (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Post-placement interconnect entropy: how many configuration bits does a programmable logic device need? - Wenyi Feng; Jonathan W. Greene (SLIP, 2006)

Improving Annealing Via Directed Moves. - Kristofer Vorwerk; Andrew A. Kennings; Jonathan W. Greene; Doris T. Chen (FPL, 2007)

Post-Placement Interconnect Entropy. - Wenyi Feng; Jonathan W. Greene (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Improving Simulated Annealing-Based FPGA Placement With Directed Moves. - Kristofer Vorwerk; Andrew A. Kennings; Jonathan W. Greene (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

A 65nm flash-based FPGA fabric optimized for low cost and power. - Jonathan W. Greene; Sinan Kaptanoglu; Wenyi Feng; Volker Hecht; Joel Landry; Fei Li 003; Anton Krouglyanskiy; Mihai Morosan; Val Pevzner (FPGA, 2011)

Rent's rule based FPGA packing for routability optimization. - Wenyi Feng; Jonathan W. Greene; Kristofer Vorwerk; Val Pevzner; Arun Kundu (FPGA, 2014)

Technology Mapping into General Programmable Cells. - Alan Mishchenko; Robert K. Brayton; Wenyi Feng; Jonathan W. Greene (FPGA, 2015)

Improving FPGA Performance with a S44 LUT Structure. - Wenyi Feng; Jonathan W. Greene; Alan Mishchenko (FPGA, 2018)

Narrowing the Synthesis Gap: Academic FPGA Synthesis is Catching Up With the Industry. - Benjamin Lukas Cajus Barzen; Arya Reais-Parsi; Eddie Hung; Minwoo Kang; Alan Mishchenko; Jonathan W. Greene; John Wawrzynek (DATE, 2023)

FPGA Mux Usage and Routability Estimates without Explicit Routing. - Jonathan W. Greene (FPGA, 2023)

Accounting for Floorplan Irregularity and Configuration Dependence in FPGA Routing Delay Models. - Gabriel Barajas; Jonathan W. Greene; Fei Li; James Tandon (ISQED, 2023)