Jonathan W. Mills

According to our database1, Jonathan W. Mills authored at least 18 papers between 1987 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2011
Routing Physarum with Electrical Flow/Current.
Int. J. Nanotechnol. Mol. Comput., 2011

2009
Awakening the Analogue Computer: Rubel's Extended Analog Computer Workshop.
Proceedings of the Unconventional Computation, 8th International Conference, 2009

The History and Future of Stiquito: A Hexapod Insectoid Robot.
Proceedings of the Artificial Life Models in Hardware, 2009

2006
"Empty space" computes: the evolution of an unconventional supercomputer.
Proceedings of the Third Conference on Computing Frontiers, 2006

Evolving Letter Recognition with an Extended Analog Computer.
Proceedings of the IEEE International Conference on Evolutionary Computation, 2006

2003
Lukasiewicz' Insect: Continuous-Valued Robotic Control After Ten Years.
J. Multiple Valued Log. Soft Comput., 2003

1998
Stiquito - advanced experiments with a simple and inexpensive robot.
IEEE, ISBN: 978-0-8186-7408-2, 1998

1996
The continuous retina: image processing with a single-sensor artificial neural field network.
Proceedings of International Conference on Neural Networks (ICNN'96), 1996

1993
Lukasiewicz' Insect: The Role of Continuous-Valued Logic in a Mobile Robot's Sensors, Control, and Locomotion.
Proceedings of the 23rd IEEE International Symposium on Multiple-Valued Logic, 1993

Frankestein's Insects (abstract).
Proceedings of the ACM 21th Conference on Computer Science, 1993

1992
Area-Efficient Implication Circuits for Very Dense Lukasiewicz Logic Arrays.
Proceedings of the 22nd IEEE International Symposium on Multiple-Valued Logic, 1992

1990
Lukasiewicz Logic Arrays.
Proceedings of the 20th International Symposium on Multiple-Valued Logic, 1990

CMOS VLSI Lukasiewicz logic arrays.
Proceedings of the Application Specific Array Processors, 1990

An analog VLSI array processor for classical and connectionist AI.
Proceedings of the Application Specific Array Processors, 1990

1989
A High-Performance Low Risc Machine for Logic Programming.
J. Log. Program., 1989

A pipelined architecture for logic programming with a complex but single-cycle instruction set.
Proceedings of the IEEE International Workshop on Tools for Artificial Intelligence: Architectures, 1989

1988
Assertive Demons.
Proceedings of the Logic Programming, 1988

1987
Coming to grips with a RISC: a report of the progress of the LOW RISC design group.
SIGARCH Comput. Archit. News, 1987


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