8.1 A 6Gb/s transceiver with a nonlinear electronic dispersion compensator for directly modulated distributed-feedback lasers. - Kyeongha Kwon; Jong-Hyeok Yoon; Soon-Won Kwon; Jaehyeok Yang; Joon-Yeong Lee; Hyosup Won; Hyeon-Min Bae (ISSCC, 2014)

A 10-Gb/s CDR With an Adaptive Optimum Loop-Bandwidth Calibrator for Serial Communication Links. - Joon-Yeong Lee; Jong-Hyeok Yoon; Hyeon-Min Bae (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A DC-to-12.5Gb/s 4.88mW/Gb/s all-rate CDR with a single LC VCO in 90nm CMOS. - Jong-Hyeok Yoon; Soon-Won Kwon; Hyeon-Min Bae (CICC, 2015)

A 6 Gb/s Transceiver With a Nonlinear Electronic Dispersion Compensator for Directly Modulated Distributed-Feedback Lasers. - Kyeongha Kwon; Jong-Hyeok Yoon; Hyeon-Min Bae (IEEE J. Solid State Circuits, 2015)

A 0.87 W Transceiver IC for 100 Gigabit Ethernet in 40 nm CMOS. - Hyosup Won; Taehun Yoon; Jinho Han; Joon-Yeong Lee; Jong-Hyeok Yoon; Taeho Kim; Jeong-Sup Lee; Sangeun Lee; Kwangseok Han; Jinhee Lee; Jinho Park 006; Hyeon-Min Bae (IEEE J. Solid State Circuits, 2015)

A 4×10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS. - Joon-Yeong Lee; Jaehyeok Yang; Jong-Hyeok Yoon; Soon-Won Kwon; Hyosup Won; Jinho Han; Hyeon-Min Bae (IEEE Trans. Very Large Scale Integr. Syst., 2016)

A DC-to-12.5 Gb/s 9.76 mW/Gb/s All-Rate CDR With a Single LC VCO in 90 nm CMOS. - Jong-Hyeok Yoon; Soon-Won Kwon; Hyeon-Min Bae (IEEE J. Solid State Circuits, 2017)

A 3.125-to-28.125 Gb/s multi-standard transceiver with a fully channel-independent operation in 40nm CMOS. - Jong-Hyeok Yoon; Kyeongha Kwon; Hyeon-Min Bae (CICC, 2018)

A 20Gb/s transceiver with framed-pulsewidth modulation in 40nm CMOS. - Sejun Jeon; Woohyun Kwon; Taehun Yoon; Jong-Hyeok Yoon; Kyeongha Kwon; Jaehyeok Yang; Hyeon-Min Bae (ISSCC, 2018)

A 28Gb/s transceiver with chirp-managed EDC for DML systems. - Kyeongha Kwon; Jong-Hyeok Yoon; Hanho Choi; Younho Jeon; Jaehyeok Yang; Bongjin Kim; Soon-Won Kwon; Minsik Kim 004; Sejun Jeon; Hyosup Won; Hyeon-Min Bae (ISSCC, 2018)

An Electronic Dispersion Compensation Transceiver for 10- and 28-Gb/s Directly Modulated Lasers-Based Optical Links. - Kyeongha Kwon; Jong-Hyeok Yoon; Younho Jeon; Hanho Choi; Sejun Jeon; Hyeon-Min Bae (IEEE J. Solid State Circuits, 2019)

31.1 A 65nm 8.79TOPS/W 23.82mW Mixed-Signal Oscillator-Based NeuroSLAM Accelerator for Applications in Edge Robotics. - Jong-Hyeok Yoon; Arijit Raychowdhury (ISSCC, 2020)

A Framed-Pulsewidth Modulation Transceiver for High-Speed Broadband Communication Links. - Sejun Jeon; Woohyun Kwon; Jong-Hyeok Yoon; Taehun Yoon; Kyeongha Kwon; Jaehyeok Yang; Hyeon-Min Bae (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

3.125-to-28.125 Gb/s 4.72 mW/Gb/s Multi- Standard Parallel Transceiver Supporting Channel-Independent Operation in 40-nm CMOS. - Jong-Hyeok Yoon; Kyeongha Kwon; Hyeon-Min Bae (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

CIM-SECDED: A 40nm 64Kb Compute In-Memory RRAM Macro with ECC Enabling Reliable Operation. - Brian Crafton; Samuel Spetalnick; Jong-Hyeok Yoon; Wei Wu; Carlos Tokunaga; Vivek De; Arijit Raychowdhury (A-SSCC, 2021)

A 40nm 100Kb 118.44TOPS/W Ternary-weight Computein-Memory RRAM Macro with Voltage-sensing Read and Write Verification for reliable multi-bit RRAM operation. - Jong-Hyeok Yoon; Muya Chang; Win-San Khwa; Yu-Der Chih; Meng-Fan Chang; Arijit Raychowdhury (CICC, 2021)

Statistical Optimization of Compute In-Memory Performance Under Device Variation. - Brian Crafton; Samuel Spetalnick; Jong-Hyeok Yoon; Arijit Raychowdhury (ISLPED, 2021)

29.1 A 40nm 64Kb 56.67TOPS/W Read-Disturb-Tolerant Compute-in-Memory/Digital RRAM Macro with Active-Feedback-Based Read and In-Situ Write Verification. - Jong-Hyeok Yoon; Muya Chang; Win-San Khwa; Yu-Der Chih; Meng-Fan Chang; Arijit Raychowdhury (ISSCC, 2021)

NeuroSLAM: A 65-nm 7.25-to-8.79-TOPS/W Mixed-Signal Oscillator-Based SLAM Accelerator for Edge Robotics. - Jong-Hyeok Yoon; Arijit Raychowdhury (IEEE J. Solid State Circuits, 2021)

DualPIM: A Dual-Precision and Low-Power CNN Inference Engine Using SRAM- and eDRAM-based Processing-in-Memory Arrays. - Sangwoo Jung; Jaehyun Lee; Huiseong Noh; Jong-Hyeok Yoon; Jaeha Kung (AICAS, 2022)

Improving compute in-memory ECC reliability with successive correction. - Brian Crafton; Zishen Wan; Samuel Spetalnick; Jong-Hyeok Yoon; Wei Wu; Carlos Tokunaga; Vivek De; Arijit Raychowdhury (DAC, 2022)

Characterization and Mitigation of IR-Drop in RRAM-based Compute In-Memory. - Brian Crafton; Connor Talley; Samuel Spetalnick; Jong-Hyeok Yoon; Arijit Raychowdhury (ISCAS, 2022)

A Neuromorphic SLAM Accelerator Supporting Multi-Agent Error Correction in Swarm Robotics. - Jaehyun Lee; Jong-Hyeok Yoon (ISOCC, 2022)

A 40-nm, 64-Kb, 56.67 TOPS/W Voltage-Sensing Computing-In-Memory/Digital RRAM Macro Supporting Iterative Write With Verification and Online Read-Disturb Detection. - Jong-Hyeok Yoon; Muya Chang; Win-San Khwa; Yu-Der Chih; Meng-Fan Chang; Arijit Raychowdhury (IEEE J. Solid State Circuits, 2022)

A 40-nm 118.44-TOPS/W Voltage-Sensing Compute-in-Memory RRAM Macro With Write Verification and Multi-Bit Encoding. - Jong-Hyeok Yoon; Muya Chang; Win-San Khwa; Yu-Der Chih; Meng-Fan Chang; Arijit Raychowdhury (IEEE J. Solid State Circuits, 2022)

BitS-Net: Bit-Sparse Deep Neural Network for Energy-Efficient RRAM-Based Compute-In-Memory. - Foroozan Karimzadeh; Jong-Hyeok Yoon; Arijit Raychowdhury (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A PRAM-based PIM Macro Using the Gilbert Multiplier-based Active Feedback and Input-aware SAR ADC. - Seongyeon Yu; Namwook Hur; Wansun Kim; Mann-Ho Cho; Hyunchul Sohn; Joonki Suh; Hongsik Jeong; Jong-Hyeok Yoon (ISOCC, 2023)

A 1V-Supply $1.85 mathrm{V}_{ text{PP}}$ -Input-Range 1kHz-BW 181.9dB-FOMDR179.4dB-FOMSNDR 2nd-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS. - Geunha Kim; Sehwan Lee; Taeryoung Seol; Seungyeob Baik; Yeonjae Shin; Gain Kim; Jong-Hyeok Yoon; Arup K. George; Junghyup Lee (ISSCC, 2023)

A 65nm 687.5-TOPS/W Drive Strength-based SRAM Compute-In-Memory Macro with Adaptive Dynamic Range for Edge AI applications. - Dong-gu Choi; Jaehyun Lee; Jahyun Koo 002; Woo Kyoung Han; Dahoon Park; Jaeha Kung; Junghyup Lee; Jong-Hyeok Yoon (A-SSCC, 2024)

BEE-SLAM: A 65nm 17.96 TOPS/W 97.55%-Sparse-Activity Hybrid Mixed-Signal/Digital Multi-Agent Neuromorphic SLAM Accelerator for Swarm Robotics. - Jaehyun Lee; Dong-gu Choi; Minyoung Song; Gain Kim; Jong-Hyeok Yoon (CICC, 2024)

30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot Surveillance. - Samuel D. Spetalnick; Ashwin Sanjay Lele; Brian Crafton; Muya Chang; Sigang Ryu; Jong-Hyeok Yoon; Zhijian Hao; Azadeh Ansari; Win-San Khwa; Yu-Der Chih; Meng-Fan Chang; Arijit Raychowdhury (ISSCC, 2024)

A 97dB-PSRR 178.4dB-FOMDR Calibration-Free VCO-ΔΣ ADC Using a PVT-Insensitive Frequency-Locked Differential Regulation Scheme for Multi-Channel ExG Acquisition. - Sehwan Lee; Taeryoung Seol; Geunha Kim; Minyoung Song; Gain Kim; Jong-Hyeok Yoon; Arup K. George; Junghyup Lee (VLSI Technology and Circuits, 2024)

A Dual-Precision and Low-Power CNN Inference Engine Using a Heterogeneous Processing-in-Memory Architecture. - Sangwoo Jung; Jaehyun Lee; Dahoon Park; Youngjoo Lee; Jong-Hyeok Yoon; Jaeha Kung (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A Discrete Multitone Wireline Transceiver Datapath With On-Chip Sign-Sign LMS Adaptation and Loading Profile Optimization on RFSoC. - Jaewon Lee; Seoyoung Jang; Donggeon Kim; Yujin Choi; Jong-Hyeok Yoon; Matthias Braendli; Thomas Morf; Marcel A. Kossel; Pier Andrea Francese; Gain Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

An Edge Accelerator With 5 MB of 0.256-pJ/bit Embedded RRAM and a Localization Solver for Bristle Robot Surveillance. - Samuel D. Spetalnick; Ashwin Sanjay Lele; Brian Crafton; Muya Chang; Sigang Ryu; Jong-Hyeok Yoon; Zhijian Hao; Azadeh Ansari; Win-San Khwa; Yu-Der Chih; Meng-Fan Chang; Arijit Raychowdhury (IEEE J. Solid State Circuits, 2025)

BEE-SLAM: A 65-nm 17.96-TOPS/W Location-Sharing-Based Multi-Agent Neuromorphic SLAM Accelerator for Swarm Robotics. - Jaehyun Lee; Dong-gu Choi; Gain Kim; Minyoung Song; Jong-Hyeok Yoon (IEEE J. Solid State Circuits, 2025)