Synthesis of a class of data format converters with specified delays. - Jongwoo Bae; Viktor K. Prasanna; Heonchul Park (ASAP, 1994)

A General Framework for Synthesis of Data Format Converters. - Jongwoo Bae; Viktor K. Prasanna (ICPP (2), 1994)

Synthesis of VLSI Architectures for Two-Dimensional Discrete Wavelet Transforms. - Jongwoo Bae; Viktor K. Prasanna (ASAP, 1995)

A fast and area-efficient VLSI architecture for embedded image coding. - Jongwoo Bae; Viktor K. Prasanna (ICIP (3), 1995)

Synthesis of memory-based VLSI architectures for discrete wavelet transforms. - Seonil Choi; Jongwoo Bae; Viktor K. Prasanna (EUSIPCO, 1996)

Synthesis of VLSI architectures for tree-structured image coding. - Neungsoo Park; Jongwoo Bae; Viktor K. Prasanna (ICIP (2), 1996)

Synthesis of area-efficient and high-throughput rate data format converters. - Jongwoo Bae; Viktor K. Prasanna (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Register Array Structure for Effective Edge Filtering Operation of Deblocking Filter. - Jongwoo Bae; Neungsoo Park; Seong-Won Lee (EUC, 2006)

Edge-adaptive local min/max nonlinear filter-based shoot suppression. - Jinsoo Cho; Jongwoo Bae (IEEE Trans. Consumer Electron., 2006)

Quarter-pel Interpolation Architecture in H.264/AVC Decoder. - Jongwoo Bae; Neungsoo Park; Seong-Won Lee (IPC, 2007)

A decoupled architecture for multi-format decoder. - Jongwoo Bae; Jinsoo Cho (IEICE Electron. Express, 2008)

Color transient improvement with transient detection and variable length nonlinear filtering. - Jinsoo Cho; Jongwoo Bae (IEEE Trans. Consumer Electron., 2008)

Parallel implementation of a financial application on a GPU. - Myungho Lee; Jin-hong Jeon; Jongwoo Bae; Hyuk-Soo Jang (ICIS, 2009)

High performance VLSI design of run_before for H.264/AVC CAVLD. - Jongwoo Bae; Jinsoo Cho; Baekhyun Kim; Jonghyen Baek (IEICE Electron. Express, 2011)

Performance Optimization of Aho-Corasick Algorithm on a GPU. - Nhat-Phuong Tran; Myungho Lee; Sugwon Hong; Jongwoo Bae (TrustCom/ISPA/IUCC, 2013)

Register array-based VLSI architecture of H.265/HEVC loop filter. - Jongwoo Bae (IEICE Electron. Express, 2013)

Geometric Image Compensation Method for a Portable Projector Based on Rewarping Using 2D Homography. - Jinsoo Cho; Jongkil Won; Jongwoo Bae (KSII Trans. Internet Inf. Syst., 2013)

High-Performance VLSI Architecture of H.264/AVC CAVLD by Parallel Run_before Estimation Algorithm. - Jongwoo Bae; Jinsoo Cho (J. Inf. Sci. Eng., 2013)

High-Throughput Parallel Architecture for H.265/HEVC Deblocking Filter. - Hoai-Huong Nguyen Le; Jongwoo Bae (J. Inf. Sci. Eng., 2014)