Lithography and design integration - New paradigm for the technology architecture development. - Jongwook Kye; Yuansheng Ma; Lei Yuan; Yunfei Deng; Harry J. Levinson (CICC, 2012)

Impact of lithography retargeting process on low level interconnect in 20nm technology. - Hongbo Zhang 001; Yunfei Deng; Jongwook Kye; Martin D. F. Wong (SLIP, 2012)

Sensitivity analysis for SoC performance benchmark against interconnect parasitic resistance and capacitance beyond 10-nm FinFET technology. - Motoi Ichihashi; Jia Zeng; Cole Zemke; Irene Lin; Greg Northrop; Ning Jin; Jongwook Kye (SoCC, 2016)

A 14.7Mb/mm2 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT Reference. - El Mehdi Boujamaa; Samsudeen Mohamed Ali; Steve Ngueya Wandji; Alexandra Gourio; Suk-Soo Pyo; Gwanhyeob Koh; Yoonjong Song; Taejoong Song; Jongwook Kye; Jean-Christophe Vial; Andrew Sowden; Manuj Rathor; et al. (VLSI Circuits, 2020)

24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit. - Taejoong Song; Woojin Rim; Hoonki Kim; Keun Hwi Cho; Taeyeong Kim; Taejung Lee; Geumjong Bae; Dong-Won Kim; S. D. Kwon; Sanghoon Baek; Jonghoon Jung; Jongwook Kye; et al. (ISSCC, 2021)

5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking Assist Circuit for 5G mobile application. - Sangyeop Baeck; Inhak Lee; Hoyoung Tang; Dongwook Seo; Jaeseung Choi 001; Taejoong Song; Jongwook Kye (VLSI Circuits, 2021)

A 28nm Embedded Flash Memory with 100MHz Read Operation and 7.42Mb/mm2 at 0.85V featuring for Automotive Application. - Hyunjin Shin; Myeonghee Oh; Jaeseung Choi 001; Taejoong Song; Jongwook Kye (VLSI Circuits, 2021)

A 32Mb Embedded Flash Memory based on 28nm with the best Cell Efficiency and Robust Design achievement featuring 13.48Mb/mm2 at 0.85V. - Hyunjin Shin; Sangkyung Won; Dohui Kim; Byunghun Choi; Gyusung Kim; Myeonghee Oh; Jaeseung Choi 001; Jongwook Kye (VLSI Technology and Circuits, 2022)

Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process. - Giyoung Yang; Hakchul Jung; Jinyoung Lim; Jaewoo Seo; Ingyum Kim; Jisu Yu; Hyeoungyu You; Jeongsoon Kong; Garoom Kim; Minjae Jeong; Chanhee Park; Sera An; et al. (VLSI Technology and Circuits, 2022)