A -31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers. - Heein Yoon; Juyeop Kim; Suneui Park; Younghyun Lim; Yongsun Lee; Jooeun Bang; Kyoohyun Lim; Jaehyouk Choi (ISSCC, 2018)

A 0.5V-VIN, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer. - Jeonghyun Lee; Jooeun Bang; Younghyun Lim; Jaehyouk Choi (VLSI Circuits, 2019)

17.8 A 170MHz-Lock-In-Range and -253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator. - Younghyun Lim; Juyeop Kim; Yongwoo Jo; Jooeun Bang; Seyeon Yoo; Hangi Park; Heein Yoon; Jaehyouk Choi (ISSCC, 2020)

A 0.0084-mV-FOM, Fast-Transient and Low-Power External-Clock-Less Digital LDO Using a Gear-Shifting Comparator for the Wide-Range Adaptive Sampling Frequency. - Jooeun Bang; Seojin Choi; Seyeon Yoo; Jeonghyun Lee; Juyeop Kim; Jaehyouk Choi (ESSCIRC, 2021)

A Wide-Lock-In-Range and Low-Jitter 12-14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop. - Younghyun Lim; Juyeop Kim; Yongwoo Jo; Jooeun Bang; Jaehyouk Choi (IEEE J. Solid State Circuits, 2022)

A $47 text{fs}_{ text{rms}}$-Jitter and 26.6mW 103.5GHz PLL with Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector and Extended Loop Bandwidth. - Jooeun Bang; Jaeho Kim; Seohee Jung; Suneui Park; Jaehyouk Choi (ISSCC, 2023)

A -51dBc-Reference-Spur and 66fsrms-Jitter D-Band PLL with Complementary Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector. - Jaeho Kim; Jooeun Bang; Seohee Jung; Myeongho Han; Jaehyouk Choi (A-SSCC, 2024)

8.5 A Command-Aware Hybrid LDO for Advanced HBM Interfaces with 150μA Quiescent Current and 20pF On-Chip Capacitor Achieving Sub-10mV Voltage Droop in 400ps Settling Time. - Jaeho Kim; Myeongho Han; Jooeun Bang; Younghyun Lim; Jaehyouk Choi (ISSCC, 2025)

A Low-Jitter and Wide-Frequency-Range D-Band Frequency Synthesizer With a Subsampling PLL and a Harmonic-Boosting Frequency Multiplier. - Seohee Jung; Jaeho Kim; Jooeun Bang; Sarang Lee; Heein Yoon; Jaehyouk Choi (IEEE J. Solid State Circuits, 2025)