A 1.2 GHz CMOS dual-modulus prescaler using new dynamic D-type flip-flops. - Byungsoo Chang; Joonbae Park; Wonchan Kim (IEEE J. Solid State Circuits, 1996)

A Semi-Digital Delay Locked Loop for Clock Skew Minimization. - Joonbae Park; Yido Koo; Wonchan Kim (VLSI Design, 1999)

Current sensing differential logic: a CMOS logic for high reliability and flexibility. - Joonbae Park; Jeongho Lee; Wonchan Kim (IEEE J. Solid State Circuits, 1999)

A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique. - Kyeongho Lee; Joonbae Park; Jeong-Woo Lee; Seung-Wook Lee; Hyung Ki Huh; Deog-Kyoon Jeong; Wonchan Kim (IEEE J. Solid State Circuits, 2001)

Split-level precharge differential logic: a new type of high-speed charge-recycling differential logic. - Jungho Lee; Joonbae Park; Byungjoon Song; Wonchan Kim (IEEE J. Solid State Circuits, 2001)

A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems. - Yido Koo; Hyungki Huh; Yongsik Cho; Jeongwoo Lee; Joonbae Park; Kyeongho Lee; Deog-Kyoon Jeong; Wonchan Kim (IEEE J. Solid State Circuits, 2002)

A dual-mode direct-conversion CMOS transceiver for Bluetooth and 802.11b. - Yeon-Jae Jung; Hoesam Jeong; Eunseok Song; Jungho Lee; Seung-Wook Lee; Donghyeon Seo; Inho Song; Sanghun Jung; Joonbae Park; Deog-Kyoon Jeong; Wonchan Kim (ESSCIRC, 2003)

Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver. - Kang-Yoon Lee; Seung-Wook Lee; Yido Koo; Hyoung-Ki Huh; Hee-Young Nam; Jeong-Woo Lee; Joonbae Park; Kyeongho Lee; Deog-Kyoon Jeong; Wonchan Kim (IEEE J. Solid State Circuits, 2003)

A 2.4-GHz 0.25-μm CMOS dual-mode direct-conversion transceiver for bluetooth and 802.11b. - Yeon-Jae Jung; Hoesam Jeong; Eunseok Song; Jungho Lee; Seung-Wook Lee; Donghyeon Seo; Inho Song; Sanghun Jung; Joonbae Park; Deog-Kyoon Jeong; Soo-Ik Chae; W. Kim (IEEE J. Solid State Circuits, 2004)

A reset-free anti-harmonic delay-locked loop using a cycle period detector. - Eunseok Song; Seung-Wook Lee; Jeong-Woo Lee; Joonbae Park; Soo-Ik Chae (IEEE J. Solid State Circuits, 2004)

Comparison frequency doubling and charge pump matching techniques for dual-band ΔΣ fractional-N frequency synthesizer. - Hyungki Huh; Yido Koo; Kang-Yoon Lee; Yeonkyeong Ok; Sungho Lee; Daehyun Kwon; Jeongwoo Lee; Joonbae Park; Kyeongho Lee; Deog-Kyoon Jeong; Wonchan Kim (IEEE J. Solid State Circuits, 2005)

20-Gb/s 5-VPP and 25-Gb/s 3.8-VPP Area-Efficient Modulator Drivers in 65-nm CMOS. - Yoonsoo Kim; Gyu-Seob Jeong; Jun-Eun Park; Joonbae Park; Gyungock Kim; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

Non-Stop & Non-Breakable Code Review Services in a Distributed System: Detecting Issues in Real Time. - Geunsik Lim; Yonghwi Kwon 003; Joonbae Park; Chul-Joo Kim (CoRR, 2022)