Joonsung Kim
Orcid: 0000-0002-5432-7813Affiliations:
- Sungkyunkwan University, College of Information and Communication Engineering, Suwon, South Korea
- Seoul National University, Department of Electrical and Computer Engineering, Seoul, South Korea (PhD 2021)
According to our database1,
Joonsung Kim
authored at least 19 papers
between 2016 and 2025.
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Bibliography
2025
IEEE Comput. Archit. Lett., 2025
GCStack+GCScaler: Fast and Accurate GPU Performance Analyses Using Fine-Grained Stall Cycle Accounting and Interval Analysis.
Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025
2024
GCStack: A GPU Cycle Accounting Mechanism for Providing Accurate Insight Into GPU Performance.
IEEE Comput. Archit. Lett., 2024
2023
A Fast and Flexible FPGA-based Accelerator for Natural Language Processing Neural Networks.
ACM Trans. Archit. Code Optim., March, 2023
2022
IEEE Comput. Archit. Lett., 2022
3D-FPIM: An Extreme Energy-Efficient DNN Acceleration System Using 3D NAND Flash-Based In-Situ PIM Unit.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
2021
ACM Trans. Storage, 2021
UC-Check: Characterizing Micro-operation Caches in x86 Processors and Implications in Security and Performance.
Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021
NLP-Fast: A Fast, Scalable, and Flexible System to Accelerate Large-Scale Heterogeneous NLP Models.
Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021
2019
FIDR: A Scalable Storage System for Fine-Grain Inline Data Reduction with Efficient Memory Handling.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019
MnnFast: a fast and scalable system architecture for memory-augmented neural networks.
Proceedings of the 46th International Symposium on Computer Architecture, 2019
CIDR: A Cost-Effective In-Line Data Reduction System for Terabit-Per-Second Scale SSD Arrays.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
μLayer: Low Latency On-Device Inference Using Cooperative Single-Layer Acceleration and Processor-Friendly Quantization.
Proceedings of the Fourteenth EuroSys Conference 2019, Dresden, Germany, March 25-28, 2019, 2019
Proceedings of the 28th International Conference on Parallel Architectures and Compilation Techniques, 2019
2018
IEEE Comput. Archit. Lett., 2018
DynaMix: Dynamic Mobile Device Integration for Efficient Cross-device Resource Sharing.
Proceedings of the 2018 USENIX Annual Technical Conference, 2018
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
2016
Proceedings of the IEEE/ACM 16th International Symposium on Cluster, 2016