An IP Core for Embedded Java Systems. - Sascha Uhrig; Jörg Mische; Theo Ungerer (SAMOS, 2007)

An Operating System Architecture for Organic Computing in Embedded Real-Time Systems. - Florian Kluge; Jörg Mische; Sascha Uhrig; Theo Ungerer (ATC, 2008)

Exploiting spare resources of in-order SMT processors executing hard real-time threads. - Jörg Mische; Sascha Uhrig; Florian Kluge; Theo Ungerer (ICCD, 2008)

Predictable dynamic instruction scratchpad for simultaneous multithreaded processors. - Stefan Metzlaff; Sascha Uhrig; Jörg Mische; Theo Ungerer (MEDEA@PACT, 2008)

A Two-Layered Management Architecture for Building Adaptive Real-Time Systems. - Florian Kluge; Sascha Uhrig; Jörg Mische; Theo Ungerer (SEUS, 2008)

IPC Control for Multiple Real-Time Threads on an In-Order SMT Processor. - Jörg Mische; Sascha Uhrig; Florian Kluge; Theo Ungerer (HiPEAC, 2009)

Implementing AUTOSAR scheduling and resource management on an embedded SMT processor. - Florian Kluge; Chenglong Yu; Jörg Mische; Sascha Uhrig; Theo Ungerer (SCOPES, 2009)

Dynamic Workload Prediction for Soft Real-Time Applications. - Florian Kluge; Sascha Uhrig; Jörg Mische; Benjamin Satzger; Theo Ungerer (CIT, 2010)

How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT. - Jörg Mische; Irakli Guliashvili; Sascha Uhrig; Theo Ungerer (ARCS, 2010)

Optimisation of Energy Consumption of Soft Real-Time Applications by Workload Prediction. - Florian Kluge; Sascha Uhrig; Jörg Mische; Benjamin Satzger; Theo Ungerer (ISORC Workshops, 2010)

RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. - Julian Wolf 002; Mike Gerdes 001; Florian Kluge; Sascha Uhrig; Jörg Mische; Stefan Metzlaff; Christine Rochange; Hugues Cassé; Pascal Sainrat; Theo Ungerer (ISORC, 2010)

Using SMT to Hide Context Switch Times of Large Real-Time Tasksets. - Jörg Mische; Sascha Uhrig; Florian Kluge; Theo Ungerer (RTCSA, 2010)

Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. - Theo Ungerer; Francisco J. Cazorla; Pascal Sainrat; Guillem Bernat; Zlatko Petrov; Christine Rochange; Eduardo Quiñones; Mike Gerdes 001; Marco Paolieri; Julian Wolf 002; Hugues Cassé; Sascha Uhrig; et al. (IEEE Micro, 2010)

Dynamic Classification for Embedded Real-Time Systems. - Florian Kluge; Jörg Mische; Theo Ungerer (Organic Computing, 2011)

RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. - Julian Wolf 002; Mike Gerdes 001; Florian Kluge; Sascha Uhrig; Jörg Mische; Stefan Metzlaff; Christine Rochange; Hugues Cassé; Pascal Sainrat; Theo Ungerer (Comput. Syst. Sci. Eng., 2011)

Echtzeitfähige Ablaufplanung für simultan mehrfädige Prozessoren. - Jörg Mische (2011)

Low power flitwise routing in an unidirectional torus with minimal buffering. - Jörg Mische; Theo Ungerer (NoCArc@MICRO, 2012)

parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. - Theo Ungerer; Christian Bradatsch; Mike Gerdes 001; Florian Kluge; Ralf Jahr; Jörg Mische; João Fernandes; Pavel G. Zaykov; Zlatko Petrov; Bert Böddeker; Sebastian Kehr; Hans Regler; et al. (DSD, 2013)

A hard real-time capable multi-core SMT processor. - Marco Paolieri; Jörg Mische; Stefan Metzlaff; Mike Gerdes 001; Eduardo Quiñones; Sascha Uhrig; Theo Ungerer; Francisco J. Cazorla (ACM Trans. Embed. Comput. Syst., 2013)

Guaranteed Service Independent of the Task Placement in NoCs with Torus Topology. - Jörg Mische; Theo Ungerer (RTNS, 2014)

Employing MPI Collectives for Timing Analysis on Embedded Multi-Cores. - Martin Frieb; Alexander Stegmeier; Jörg Mische; Theo Ungerer (WCET, 2016)

WCTT bounds for MPI primitives in the PaterNoster NoC. - Alexander Stegmeier; Jörg Mische; Martin Frieb; Theo Ungerer (SIGBED Rev., 2016)

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. - Theo Ungerer; Christian Bradatsch; Martin Frieb; Florian Kluge; Jörg Mische; Alexander Stegmeier; Ralf Jahr; Mike Gerdes 001; Pavel G. Zaykov; Lucie Matusova; Zai Jian Jia Li; Zlatko Petrov; et al. (ACM Trans. Embed. Comput. Syst., 2016)

Reduced Complexity Many-Core: Timing Predictability Due to Message-Passing. - Jörg Mische; Martin Frieb; Alexander Stegmeier; Theo Ungerer (ARCS, 2017)

Minimally buffered deflection routing with in-order delivery in a torus. - Jörg Mische; Christian Mellwig; Alexander Stegmeier; Martin Frieb; Theo Ungerer (NOCS, 2017)

Lightweight Hardware Synchronization for Avoiding Buffer Overflows in Network-on-Chips. - Martin Frieb; Alexander Stegmeier; Jörg Mische; Theo Ungerer (ARCS, 2018)

Analysing Real-Time Behaviour of Collective Communication Patterns in MPI. - Alexander Stegmeier; Martin Frieb; Jörg Mische; Theo Ungerer (RTNS, 2018)

PIMP My Many-Core: Pipeline-Integrated Message Passing. - Jörg Mische; Martin Frieb; Alexander Stegmeier; Theo Ungerer (Int. J. Parallel Program., 2021)