Organisatorische Anforderungen an ein Netzmanagementsystem zur Verwaltung heterogener Netze. - Jochen W. Münch; Lothar Hofmann; Günther Fischer; Klaus Köhler; Jörg Weller; Lutz Emmerich (GI-Fachgespräch über Rechenzentren, 1991)

A 2Gb/s/pin 512Mb Graphics DRAM with NoiseReduction Techniques. - Martin Brox; H. Fibranz; Maksim Kuzmenka; F. Lu; S. Mann; M. Markert; U. Möller; Manfred Plan; Kai Schiller; P. Schmölz; P. Schrögmeier; A. Täuber; et al. (ISSCC, 2006)

75nm 7Gb/s/pin 1Gb GDDR5 graphics memory device with bandwidth-improvement techniques. - Rex Kho; David Boursin; Martin Brox; Peter Gregorius; Heinz Hoenigschmid; Bianka Kho; Sabine Kieser; Daniel Kehrer; Maksim Kuzmenka; Udo Moeller; Pavel Veselinov Petkov; Manfred Plan; et al. (ISSCC, 2009)

A 75 nm 7 Gb/s/pin 1 Gb GDDR5 Graphics Memory Device With Bandwidth Improvement Techniques. - Rex Kho; David Boursin; Martin Brox; Peter Gregorius; Heinz Hoenigschmid; Bianka Kho; Sabine Kieser; Daniel Kehrer; Maksim Kuzmenka; Udo Moeller; Pavel Veselinov Petkov; Manfred Plan; et al. (IEEE J. Solid State Circuits, 2010)

23.1 An 8Gb 12Gb/s/pin GDDR5X DRAM for cost-effective high-performance applications. - Martin Brox; Mani Balakrishnan; Martin Broschwitz; Cristian Chetreanu; Stefan Dietrich; Fabien Funfrock; Marcos Alvarez Gonzalez; Thomas Hein; Eugen Huber; Daniel Lauber; Milena Ivanov; Maksim Kuzmenka; et al. (ISSCC, 2017)

An 8-Gb 12-Gb/s/pin GDDR5X DRAM for Cost-Effective High-Performance Applications. - Martin Brox; Mani Balakrishnan; Martin Broschwitz; Cristian Chetreanu; Stefan Dietrich; Fabien Funfrock; Marcos Alvarez Gonzalez; Thomas Hein; Eugen Huber; Daniel Lauber; Milena Ivanov; Maksim Kuzmenka; et al. (IEEE J. Solid State Circuits, 2018)

25.3 An 8Gb GDDR6X DRAM Achieving 22Gb/s/pin with Single-Ended PAM4 Signaling. - Timothy M. Hollis; Ronny Schneider; Martin Brox; Thomas Hein; Wolfgang Spirkl; Martin Bach; Mani Balakrishnan; Stefan Dietrich; Fabien Funfrock; Milena Ivanov; Natalija Jovanovic; Maksim Kuzmenka; et al. (ISSCC, 2021)

An 8-Gb GDDR6X DRAM Achieving 22 Gb/s/pin With Single-Ended PAM-4 Signaling. - Timothy M. Hollis; Ronny Schneider; Martin Brox; Thomas Hein; Wolfgang Spirkl; Martin Bach; Mani Balakrishnan; Stefan Dietrich; Fabien Funfrock; Milena Ivanov; Natalija Jovanovic; Maksim Kuzmenka; et al. (IEEE J. Solid State Circuits, 2022)