A flash memory technology with quasi-virtual ground array for low-cost embedded applications. - Jorgo Tsouhlarakis; Guido Vanhorebeek; Geert Verhoeven; Jan De Blauwe; Shiho Kim; Dirk Wellekens; Paul Hendrickx; Luc Haspeslagh; Jan Van Houdt; Herman Maes (IEEE J. Solid State Circuits, 2001)

A 60 dB SNDR 35 MS/s SAR ADC With Comparator-Noise-Based Stochastic Residue Estimation. - Bob Verbruggen; Jorgo Tsouhlarakis; Takaya Yamamoto; Masao Iriguchi; Ewout Martens; Jan Craninckx (IEEE J. Solid State Circuits, 2015)