Analytical modeling of parasitics in monolithically integrated 3D inverters. - Joris Lacord; Perrine Batude; Gérard Ghibaudo; Frédéric Boeuf (ICICDT, 2012)

The importance of the spacer region to explain short channels mobility collapse in 28nm Bulk and FDSOI technologies. - Frederic Monsieur; Yvan Denis; Denis Rideau; Vincent Quenette; Gilles Gouget; Clément Tavernier; Hervé Jaouen; Gérard Ghibaudo; Joris Lacord (ESSDERC, 2014)

From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose. - Gerald Cibrario; Nour Ben Salem; Joris Lacord; Karim Azizi-Mourier; Olivier Rozeau; Etienne Maurin; Olivier Billoint; Sébastien Thuries; Alexandre Valentian (3DIC, 2016)

Impact of intermediate BEOL technology on standard cell performances of 3D VLSI. - Melanie Brocard; Guillaume Berhault; Sébastien Thuries; Fabien Clermidy; Perrine Batude; Claire Fenouillet-Béranger; Laurent Brunet; François Andrieu; Fabien Deprat; Joris Lacord; Olivier Rozeau; Gerald Cibrario; et al. (ESSDERC, 2016)

Ultra-High-density 3D vertical RRAM with stacked JunctionLess nanowires for In-Memory-Computing applications. - Mona Ezzadeen; D. Bosch; Bastien Giraud; Sylvain Barraud; Jean-Philippe Noël; Didier Lattard; Joris Lacord; Jean-Michel Portal; François Andrieu (CoRR, 2020)

Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integration. - Tadeu Mota Frutuoso; Jose Lugo-Alvarez; Xavier Garros; Laurent Brunet; Joris Lacord; Louis Gerrer; Mikaël Cassé; Edoardo Catapano; Claire Fenouillet-Béranger; François Andrieu; Fred Gaillard; Philippe Ferrari (IRPS, 2021)

A novel 3D 1T1R RRAM architecture for memory-centric Hyperdimensional Computing. - T. Dubreuil; P. Amari; Sylvain Barraud; Joris Lacord; Eduardo Esmanhotto; Valentina Meli; S. Martin; Niccolo Castellani; Bernard Previtali; François Andrieu (IMW, 2022)

Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration. - Tadeu Mota Frutuoso; Xavier Garros; Perrine Batude; Laurent Brunet; Joris Lacord; Benoit Sklénard; V. Lapras; Claire Fenouillet-Béranger; M. Ribotta; A. Magalhaes-Lucas; J. Kanyandekwe; R. Kies; et al. (VLSI Technology and Circuits, 2022)

Influence of Process Integration on pBTI Degradation in Analog SOI nMOSFETs. - Abygaël Viey; William Vandendaele; P. Kouaté Wafo; Xavier Garros; Luigi Basset; F. Ponthenier; Joris Lacord; R. Fillon; X. Federspiel; D. Roy; S. Joblot; Dominique Golanski (IRPS, 2025)