Real-time structured analysis in system level design of embedded ASICs. - Timo Juntunen; Jorma Kivelä; Auli Reinikka; Matti Sipola; Juha-Pekka Soininen; Kari Tiensyrjä; Tuomo Tikkanen (Microprocess. Microprogramming, 1988)

Structured analysis and VHDL in embedded ASIC design and verification. - Tuomo Tikkanen; Timo Lappänen; Jorma Kivelä (EURO-DAC, 1990)

Logic Compilation from Graphical Dependency Notation. - Jukka Lahti; Jorma Kivelä (ICCAD, 1990)

SADE: A Graphical Tool for VHDL-Based System Analysis. - Jukka Lahti; Matti Sipola; Jorma Kivelä (ICCAD, 1991)

Logic Design and Synthesis with IEEE Logic Symbols in the DEMET System. - Jukka Lahti; Jorma Kivelä (VLSI Design, 1992)

Predicting TV in the year 2013. - Hao Zheng; Tuija Aalto; Jorma Kivelä; Artur Lugmayr; Erik Bäckman; Jere Hartimaine; Sauli Niskanen; Timo Manninen; Juha Rapeli (MindTrek, 2011)