A New Characterization Method for Delay and Power Dissipation of Standard Library Cells. - Jos B. Sulistyo; Dong Sam Ha (VLSI Design, 2002)

5 GHz pipelined multiplier and MAC in 0.18µm complementary static CMOS. - Jos Sulistyo; Dong Sam Ha (ISCAS (5), 2003)

Gigahertz-range MCML multiplier architectures. - Venkat Srinivasan; Dong Sam Ha; Jos Sulistyo (ISCAS (2), 2004)