Doubly folded transistor matrix layout. - Lukas P. P. P. van Genneken; Jos T. J. van Eijndhoven; Jos A. H. C. M. Brouwers (ICCAD, 1988)

Multirate integration in a direct simulation method. - Jos T. J. van Eijndhoven; M. T. van Stiphout; H. W. Buurman (EURO-DAC, 1990)

PLATO: a new piecewise linear simulation tool. - M. T. van Stiphout; Jos T. J. van Eijndhoven; H. W. Buurman (EURO-DAC, 1990)

Flexible Block-Multiplier Generation. - H. M. A. M. Arts; Jos T. J. van Eijndhoven; Leon Stok (ICCAD, 1991)

Module Generation in an Architectural Synthesis Environment. - J. F. M. Theeuwen; H. M. A. M. Arts; Jos T. J. van Eijndhoven; H. J. H. Sleuters; J. H. P. Wijdeven (Synthesis for Control Dominated Circuits, 1992)

On Design Rule Correct Maze Routing. - Ed P. Huijbregts; Jos T. J. van Eijndhoven; Jochen A. G. Jess (EDAC-ETC-EUROASIC, 1994)

A Constructive Method for Exploiting Code Motion. - Luiz C. V. dos Santos; Marc J. M. Heijligers; C. A. J. van Eijk; Jos T. J. van Eijndhoven; Jochen A. G. Jess (ISSS, 1996)

TriMedia CPU64 Architecture. - Jos T. J. van Eijndhoven; Kees A. Vissers; Evert-Jan D. Pol; P. Struik; R. H. J. Bloks; Pieter van der Wolf; Harald P. E. Vranken; Frans Sijstermans; M. J. A. Tromp; Andy D. Pimentel (ICCD, 1999)

TriMedia CPU64 Application Development Environment. - Evert-Jan D. Pol; Bas Aarts; Jos T. J. van Eijndhoven; P. Struik; Pieter van der Wolf; Frans Sijstermans; M. J. A. Tromp; Jan-Willem van de Waerdt (ICCD, 1999)

PRMDL: a machine description language for clustered VLIW architectures. - Andrei Sergeevich Terechko; Evert-Jan D. Pol; Jos T. J. van Eijndhoven (DATE, 2001)

An 8x8 IDCT Implementation on an FPGA-Augmented TriMedia. - Mihai Sima; Sorin Cotofana; Jos T. J. van Eijndhoven; Stamatis Vassiliadis; Kees A. Vissers (FCCM, 2001)

MPEG Macroblock Parsing and Pel Reconstruction On An FPGA-Augmented TriMedia Processor. - Mihai Sima; Sorin Cotofana; Stamatis Vassiliadis; Jos T. J. van Eijndhoven; Kees A. Vissers (ICCD, 2001)

Design of multi-tasking coprocessor control for Eclipse. - Martijn J. Rutten; Jos T. J. van Eijndhoven; Evert-Jan D. Pol (CODES, 2002)

Robust Media Processing in a Flexible and Cost-Effective Network of Multi-Tasking Coprocessors. - Martijn J. Rutten; Jos T. J. van Eijndhoven; Evert-Jan D. Pol (ECRTS, 2002)

MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64. - Mihai Sima; Sorin Cotofana; Stamatis Vassiliadis; Jos T. J. van Eijndhoven; Kees A. Vissers (FCCM, 2002)

Field-Programmable Custom Computing Machines - A Taxonomy -. - Mihai Sima; Stamatis Vassiliadis; Sorin Cotofana; Jos T. J. van Eijndhoven; Kees A. Vissers (FPL, 2002)

Speculative Trace Scheduling in VLIW Processors. - Manvi Agarwal; S. K. Nandy 001; Jos T. J. van Eijndhoven; Srinivasan Balakrishnan (ICCD, 2002)

Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing. - Martijn J. Rutten; Jos T. J. van Eijndhoven; Evert-Jan D. Pol; Egbert G. T. Jaspers; Pieter van der Wolf; Om Prakash Gangwal; Adwin H. Timmer (IPDPS, 2002)

On the Benefits of Speculative Trace Scheduling in VLIW Processors. - Manvi Agarwal; S. K. Nandy 001; Jos T. J. van Eijndhoven; Srinivasan Balakrishnan (PDPTA, 2002)

A 2D Addressing Mode for Multimedia Applications. - Georgi Kuzmanov; Stamatis Vassiliadis; Jos T. J. van Eijndhoven (Embedded Processor Design Challenges, 2002)

A Reconfigurable Functional Unit for TriMedia/CPU64. A Case Study. - Mihai Sima; Sorin Cotofana; Stamatis Vassiliadis; Jos T. J. van Eijndhoven; Kees A. Vissers (Embedded Processor Design Challenges, 2002)

Multithreaded Architectural Support for Speculative Trace Scheduling in VLIW Processors. - Manvi Agarwal; S. K. Nandy 001; Jos T. J. van Eijndhoven; S. Balakrishanan (SBCCI, 2002)

System-Level Design of Embedded Media Systems (Tutorial Abstract). - Pieter van der Wolf; W. M. Kruijtzer; Jos T. J. van Eijndhoven (ASP-DAC/VLSI Design, 2002)

A Heterogeneous Multiprocessor Architecture for Flexible Media Processing. - Martijn J. Rutten; Jos T. J. van Eijndhoven; Egbert G. T. Jaspers; Pieter van der Wolf; Evert-Jan D. Pol; Om Prakash Gangwal; Adwin H. Timmer (IEEE Des. Test Comput., 2002)

Color Space Conversion for MPEG decoding on FPGA-augmented TriMedia Processor. - Mihai Sima; Stamatis Vassiliadis; Sorin Cotofana; Jos T. J. van Eijndhoven (ASAP, 2003)

Inter-Cluster Communication Models for Clustered VLIW Processors. - Andrei Sergeevich Terechko; Erwan Le Thenaff; Manish Garg; Jos T. J. van Eijndhoven; Henk Corporaal (HPCA, 2003)

Design of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks. - Rohini Krishnan; Om Prakash Gangwal; Jos T. J. van Eijndhoven; Anshul Kumar (VLSI Design, 2003)

Compositional Memory Systems for Data Intensive Applications. - Anca Mariana Molnos; Marc J. M. Heijligers; Sorin Cotofana; Jos T. J. van Eijndhoven (DATE, 2004)

Application design trajectory towards reusable coprocessors MPEG case study. - Martijn J. Rutten; Om Prakash Gangwal; Jos T. J. van Eijndhoven; Egbert G. T. Jaspers; Evert-Jan D. Pol (ESTIMedia, 2004)

Pel reconstruction on FPGA-augmented TriMedia. - Mihai Sima; Sorin Dan Cotofana; Stamatis Vassiliadis; Jos T. J. van Eijndhoven; Kees A. Vissers (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Compositional Memory Systems for Multimedia Communicating Tasks. - Anca Mariana Molnos; Marc J. M. Heijligers; Sorin Dan Cotofana; Jos T. J. van Eijndhoven (DATE, 2005)

Hardwired MPEG-4 repetitive padding. - Georgi Kuzmanov; Stamatis Vassiliadis; Jos T. J. van Eijndhoven (IEEE Trans. Multim., 2005)

IEEE-Compliant IDCT on FPGA-Augmented TriMedia. - Mihai Sima; Sorin Cotofana; Jos T. J. van Eijndhoven; Stamatis Vassiliadis; Kees A. Vissers (J. VLSI Signal Process., 2005)

Compositional, efficient caches for a chip multi-processor. - Anca Mariana Molnos; Marc J. M. Heijligers; Sorin Dan Cotofana; Jos T. J. van Eijndhoven (DATE, 2006)

Throughput optimization via cache partitioning for embedded multiprocessors. - Anca Mariana Molnos; Sorin Dan Cotofana; Marc J. M. Heijligers; Jos T. J. van Eijndhoven (ICSAMOS, 2006)

2D-to-3D TV Image Mapping on TriMedias. - Xing Li; Paulus Stravers; Jos T. J. van Eijndhoven; Robert-Paul Berretty (HPCNCS, 2007)

Static Cache Partitioning Robustness Analysis for Embedded On-Chip Multi-processors. - Anca Mariana Molnos; Sorin Dan Cotofana; Marc J. M. Heijligers; Jos T. J. van Eijndhoven (Trans. High Perform. Embed. Archit. Compil., 2007)

Compositional, Dynamic Cache Management for Embedded Chip Multiprocessors. - Anca Mariana Molnos; Sorin Cotofana; Marc J. M. Heijligers; Jos T. J. van Eijndhoven (J. Signal Process. Syst., 2009)