An Algorithm for Scheduling Prioritized Tasks in a Hard Real-Time Environment. - Joshua Etkin; José Fridman (EUROMICRO, 1996)

On the Scalability of 2-D Discrete Wavelet Transform Algorithms. - José Fridman; Elias S. Manolakos (Multidimens. Syst. Signal Process., 1997)

Maximizing Mean-Time to Failure in k-Resilient Systems with Repair. - José Fridman; Sampath Rangarajan (IEEE Trans. Computers, 1997)

Discrete wavelet transform: data dependence analysis and synthesis of distributed memory and control array architectures. - José Fridman; Elias S. Manolakos (IEEE Trans. Signal Process., 1997)

A new parallel DSP with short-vector memory architecture. - José Fridman; William C. Anderson (ICASSP, 1999)

Recent developments in enabling technologies for software defined radio. - Dimitrios Efstathiou; José Fridman; Zoran Zvonar (IEEE Commun. Mag., 1999)

DSPTune: A Performance Evaluation Toolset for the SHARC Signal Processor. - Suleyman Sair; Guiseppe Olivadoti; David R. Kaeli; José Fridman (Annual Simulation Symposium, 2000)

The TigerSHARC DSP Architecture. - José Fridman; Zvi Greenfield (IEEE Micro, 2000)

Sub-word parallelism in digital signal processing. - José Fridman (IEEE Signal Process. Mag., 2000)

A 333-MHz dual-MAC DSP architecture for next-generation wireless applications. - Ravi K. Kolagotla; José Fridman; Marc M. Hoffman; William C. Anderson; Bradley C. Aldrich; David B. Witt; Michael S. Allen; Randy R. Dunton; Lawrence A. Booth Jr. (ICASSP, 2001)

Distributed Memory Parallel Architecture Based on Modular Linear Arrays for 2-D Separable Transforms Computation. - José Fridman; Elias S. Manolakos (J. VLSI Signal Process., 2001)

Performance analysis of turbo decoder for 3GPP standard using the sliding window algorithm. - Mohamadreza Marandian; José Fridman; Zoran Zvonar; Masoud Salehi (PIMRC, 2002)

Performance Analysis of Sliding Window Turbo Decoding Algorithms for 3GPP FDD Mode. - Mohamadreza Marandian; José Fridman; Zoran Zvonar; Masoud Salehi (Int. J. Wirel. Inf. Networks, 2002)

DSP technology in industry. - José Fridman; Michael Deisher (IEEE Signal Process. Mag., 2002)

High performance dual-MAC DSP architecture. - Ravi K. Kolagotla; José Fridman; Bradley C. Aldrich; Marc M. Hoffman; William C. Anderson; Michael S. Allen; David B. Witt; Randy R. Dunton; Lawrence A. Booth Jr. (IEEE Signal Process. Mag., 2002)

Cached memory performance characterization of a wireless digital baseband processor. - Srikanth Kannan; Michael S. Allen; José Fridman (ICASSP (5), 2004)