On the influence of compiler optimizations in the fault tolerance of embedded systems. - Alejandro Serrano-Cases; Jose Isaza-Gonzalez; Sergio Cuenca-Asensi; Antonio Martínez-Álvarez (IOLTS, 2016)

Dependability evaluation of COTS microprocessors via on-chip debugging facilities. - Jose Isaza-Gonzalez; Alejandro Serrano-Cases; Felipe Restrepo-Calle; Sergio Cuenca-Asensi; Antonio Martínez-Álvarez (LATS, 2016)

Contrast of a HDL model and COTS version of a microprocessor for soft-error testing. - Jose Isaza-Gonzalez; Alejandro Serrano-Cases; Antonio Martínez-Álvarez; Sergio Cuenca-Asensi; Hipólito Guzmán-Miranda; Miguel A. Aguirre (LATS, 2017)

SHARC: An efficient metric for selective protection of software against soft errors. - Jose Isaza-Gonzalez; Felipe Restrepo-Calle; Antonio Martínez-Álvarez; Sergio Cuenca-Asensi (Microelectron. Reliab., 2018)

An Experimental Comparison of Fault Injection Tools for Microprocessor-based Systems. - Alexander Aponte-Moreno; José Isaza-González; Alejandro Serrano-Cases; Antonio Martínez-Álvarez; Sergio Cuenca-Asensi; Felipe Restrepo-Calle (LATS, 2020)

Evaluation of fault injection tools for reliability estimation of microprocessor-based embedded systems. - Alexander Aponte-Moreno; José Isaza-González; Alejandro Serrano-Cases; Antonio Martínez-Álvarez; Sergio Cuenca-Asensi; Felipe Restrepo-Calle (Microprocess. Microsystems, 2023)