Multicore Platforms for Scientific Computing: Cell BE and NVIDIA Tesla. - Juan Fernández 001; Manuel E. Acacio; Gregorio Bernabé; José L. Abellán; Joaquín Franco (CSC, 2008)

Characterizing the Basic Synchronization and Communication Operations in Dual Cell-Based Blades. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (ICCS (1), 2008)

CellStats: A Tool to Evaluate the Basic Synchronization and Communication Operations of the Cell BE. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (PDP, 2008)

Efficient and scalable barrier synchronization for many-core CMPs. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (Conf. Computing Frontiers, 2010)

A G-Line-Based Network for Fast and Efficient Barrier Synchronization in Many-Core CMPs. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (ICPP, 2010)

Characterizing the basic synchronization and communication operations in Dual Cell-based Blades through CellStats. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (J. Supercomput., 2010)

GLocks: Efficient Support for Highly-Contended Locks in Many-Core CMPs. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (IPDPS, 2011)

Design of a collective communication infrastructure for barrier synchronization in cluster-based nanoscale MPSoCs. - José L. Abellán; Juan Fernández Peinador; Manuel E. Acacio; Davide Bertozzi; Daniele Bortolotti; Andrea Marongiu; Luca Benini (DATE, 2012)

Stencil computations on heterogeneous platforms for the Jacobi method: GPUs versus Cell BE. - José M. Cecilia; José L. Abellán; Juan Fernández 001; Manuel E. Acacio; José M. García 001; Manuel Ujaldon (J. Supercomput., 2012)

Efficient Hardware Barrier Synchronization in Many-Core CMPs. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (IEEE Trans. Parallel Distributed Syst., 2012)

Deploying Hardware Locks to Improve Performance and Energy Efficiency of Hardware Transactional Memory. - Epifanio Gaona-Ramírez; José L. Abellán; Manuel E. Acacio; Juan Fernández 001 (ARCS, 2013)

Efficient Dir0B Cache Coherency for Many-Core CMPs. - José L. Abellán; Alberto Ros 001; Juan Fernández 001; Manuel E. Acacio (ICCS, 2013)

ECONO: Express coherence notifications for efficient cache coherency in many-core CMPs. - José L. Abellán; Alberto Ros 001; Juan Fernández Peinador; Manuel E. Acacio (ICSAMOS, 2013)

Design of an efficient communication infrastructure for highly contended locks in many-core CMPs. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (J. Parallel Distributed Comput., 2013)

Thermal management of manycore systems with silicon-photonic networks. - Tiansheng Zhang; José L. Abellán; Ajay Joshi; Ayse K. Coskun (DATE, 2014)

Leveraging Silicon-Photonic NoC for Designing Scalable GPUs. - Amir Kavyan Ziabari; José L. Abellán; Rafael Ubal; Chao Chen 003; Ajay Joshi; David R. Kaeli (ICS, 2015)

Enhancing the Parallelization of Non-bonded Interactions Kernel for Virtual Screening on GPUs. - Baldomero Imbernon; Antonio Llanes; Jorge Peña-García; José L. Abellán; Horacio Pérez Sánchez; José M. Cecilia (IWBBIO (2), 2015)

Asymmetric NoC Architectures for GPU Systems. - Amir Kavyan Ziabari; José L. Abellán; Yenai Ma; Ajay Joshi; David R. Kaeli (NOCS, 2015)

Managing Laser Power in Silicon-Photonic NoC Through Cache and NoC Reconfiguration. - Chao Chen 003; José L. Abellán; Ajay Joshi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

Fast and efficient commits for Lazy-Lazy hardware transactional memory. - Epifanio Gaona-Ramírez; José L. Abellán; Manuel E. Acacio (J. Supercomput., 2015)

Efficient Hardware-Supported Synchronization Mechanisms for Manycores. - José L. Abellán; Juan Fernández 001; Manuel E. Acacio (Handbook on Data Centers, 2015)

Electro-Photonic NoC Designs for Kilocore Systems. - José L. Abellán; Chao Chen 003; Ajay Joshi (ACM J. Emerg. Technol. Comput. Syst., 2016)

UMH: A Hardware-Based Unified Memory Hierarchy for Systems with Multiple Discrete GPUs. - Amir Kavyan Ziabari; Yifan Sun 002; Yenai Ma; Dana Schaa; José L. Abellán; Rafael Ubal; John Kim 001; Ajay Joshi; David R. Kaeli (ACM Trans. Archit. Code Optim., 2016)

Secure communications in wireless network-on-chips. - Fernando Pereñíguez-Garcia; José L. Abellán (AISTECS@HiPEAC, 2017)

Adaptive Tuning of Photonic Devices in a Photonic NoC Through Dynamic Workload Allocation. - José L. Abellán; Ayse K. Coskun; Anjun Gu; Warren Jin 002; Ajay Joshi; Andrew B. Kahng; Jonathan Klamkin; Cristian Morales; John Recchio; Vaishnav Srinivas; Tiansheng Zhang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Accelerating Drugs Discovery with Deep Reinforcement Learning: An Early Approach. - Antonio Serrano; Baldomero Imbernón; Horacio Pérez Sánchez; José M. Cecilia; Andrés Bueno-Crespo; José L. Abellán (ICPP Workshops, 2018)

Profiling DNN Workloads on a Volta-based DGX-1 System. - Saiful A. Mojumder; Marcia S. Louis; Yifan Sun 002; Amir Kavyan Ziabari; José L. Abellán; John Kim 001; David R. Kaeli; Ajay Joshi (IISWC, 2018)

MGSim + MGMark: A Framework for Multi-GPU System Research. - Yifan Sun 002; Trinayan Baruah; Saiful A. Mojumder; Shi Dong 002; Rafael Ubal; Xiang Gong; Shane Treadway; Yuhui Bao; Vincent Zhao; José L. Abellán; John Kim 001; Ajay Joshi; et al. (CoRR, 2018)

Photonic-based express coherence notifications for many-core CMPs. - José L. Abellán; Eduardo Padierna; Alberto Ros 001; Manuel E. Acacio (J. Parallel Distributed Comput., 2018)

High-throughput Ant Colony Optimization on graphics processing units. - José M. Cecilia; Antonio Llanes; José L. Abellán; Juan Gómez-Luna; Li-Wen Chang; Wen-Mei W. Hwu (J. Parallel Distributed Comput., 2018)

CNN-SIM: A Detailed Arquitectural Simulator of CNN Accelerators. - Francisco Muñoz-Martínez; José L. Abellán; Manuel E. Acacio (Euro-Par Workshops, 2019)

MGPUSim: enabling multi-GPU performance modeling and optimization. - Yifan Sun 002; Trinayan Baruah; Saiful A. Mojumder; Shi Dong 002; Xiang Gong; Shane Treadway; Yuhui Bao; Spencer Hance; Carter McCardwell; Vincent Zhao; Harrison Barclay; Amir Kavyan Ziabari; et al. (ISCA, 2019)

InsideNet: A tool for characterizing convolutional neural networks. - Francisco Muñoz-Martínez; José L. Abellán; Manuel E. Acacio (Future Gener. Comput. Syst., 2019)

Valkyrie: Leveraging Inter-TLB Locality to Enhance GPU Performance. - Trinayan Baruah; Yifan Sun 002; Saiful A. Mojumder; José L. Abellán; Yash Ukidave; Ajay Joshi; Norman Rubin; John Kim 001; David R. Kaeli (PACT, 2020)

Griffin: Hardware-Software Support for Efficient Page Migration in Multi-GPU Systems. - Trinayan Baruah; Yifan Sun 002; Ali Tolga Dinçer; Saiful A. Mojumder; José L. Abellán; Yash Ukidave; Ajay Joshi; Norman Rubin; John Kim 001; David R. Kaeli (HPCA, 2020)

Design Space Exploration of Accelerators and End-to-End DNN Evaluation with TFLITE-SOC. - Nicolas Bohm Agostini; Shi Dong 002; Elmira Karimi; Marti Torrents Lapuerta; José Cano 001; José L. Abellán; David R. Kaeli (SBAC-PAD, 2020)

QN-Docking: An innovative molecular docking methodology based on Q-Networks. - Antonio Serrano; Baldomero Imbernón; Horacio Pérez Sánchez; José M. Cecilia; Andrés Bueno-Crespo; José L. Abellán (Appl. Soft Comput., 2020)

STONNE: A Detailed Architectural Simulator for Flexible Neural Network Accelerators. - Francisco Muñoz-Martínez; José L. Abellán; Manuel E. Acacio; Tushar Krishna (CoRR, 2020)

HALCONE : A Hardware-Level Timestamp-based Cache Coherence Scheme for Multi-GPU systems. - Saiful A. Mojumder; Yifan Sun 002; Leila Delshadtehrani; Yenai Ma; Trinayan Baruah; José L. Abellán; John Kim 001; David R. Kaeli; Ajay Joshi (CoRR, 2020)

MGPU-TSM: A Multi-GPU System with Truly Shared Memory. - Saiful A. Mojumder; Yifan Sun 002; Leila Delshadtehrani; Yenai Ma; Trinayan Baruah; José L. Abellán; John Kim 001; David R. Kaeli; Ajay Joshi (CoRR, 2020)

TAP-2.5D: A Thermally-Aware Chiplet Placement Methodology for 2.5D Systems. - Yenai Ma; Leila Delshadtehrani; Cansu Demirkiran; José L. Abellán; Ajay Joshi (DATE, 2021)

GNNMark: A Benchmark Suite to Characterize Graph Neural Network Training on GPUs. - Trinayan Baruah; Kaustubh Shivdikar; Shi Dong 002; Yifan Sun 002; Saiful A. Mojumder; Kihoon Jung; José L. Abellán; Yash Ukidave; Ajay Joshi; John Kim 001; David R. Kaeli (ISPASS, 2021)

A novel network fabric for efficient spatio-temporal reduction in flexible DNN accelerators. - Francisco Muñoz-Martínez; José L. Abellán; Manuel E. Acacio; Tushar Krishna (NOCS, 2021)

The Challenge of Classification Confidence Estimation in Dynamically-Adaptive Neural Networks. - Francesco Dall'Occo; Andrés Bueno-Crespo; José L. Abellán; Davide Bertozzi; Michele Favalli (SAMOS, 2021)

METADOCK 2: a high-throughput parallel metaheuristic scheme for molecular docking. - Baldomero Imbernón; Antonio Serrano; Andrés Bueno-Crespo; José L. Abellán; Horacio Pérez Sánchez; José M. Cecilia (Bioinform., 2021)

STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators. - Francisco Muñoz-Martínez; José L. Abellán; Manuel E. Acacio; Tushar Krishna (IEEE Comput. Archit. Lett., 2021)

A Taxonomy for Classification and Comparison of Dataflows for GNN Accelerators. - Raveesh Garg; Eric Qin 001; Francisco Muñoz-Martínez; Robert Guirado; Akshay Jain 001; Sergi Abadal; José L. Abellán; Manuel E. Acacio; Eduard Alarcón; Sivasankaran Rajamanickam; Tushar Krishna (CoRR, 2021)

Spartan: A Sparsity-Adaptive Framework to Accelerate Deep Neural Network Training on GPUs. - Shi Dong 002; Yifan Sun 002; Nicolas Bohm Agostini; Elmira Karimi; Daniel Lowell; Jing Zhou; José Cano 001; José L. Abellán; David R. Kaeli (IEEE Trans. Parallel Distributed Syst., 2021)

NaviSim: A Highly Accurate GPU Simulator for AMD RDNA GPUs. - Yuhui Bao; Yifan Sun 002; Zlatan Feric; Michael Tian Shen; Micah Weston; José L. Abellán; Trinayan Baruah; John Kim 001; Ajay Joshi; David R. Kaeli (PACT, 2022)

Understanding the Design-Space of Sparse/Dense Multiphase GNN dataflows on Spatial Accelerators. - Raveesh Garg; Eric Qin 001; Francisco Muñoz-Martínez; Robert Guirado; Akshay Jain 001; Sergi Abadal; José L. Abellán; Manuel E. Acacio; Eduard Alarcón; Sivasankaran Rajamanickam; Tushar Krishna (IPDPS, 2022)

Accelerating Polynomial Multiplication for Homomorphic Encryption on GPUs. - Kaustubh Shivdikar; Gilbert Jonatan; Evelio Mora; Neal Livesay; Rashmi Agrawal 001; Ajay Joshi; José L. Abellán; John Kim 001; David R. Kaeli (SEED, 2022)

Flexagon: A Multi-dataflow Sparse-Sparse Matrix Multiplication Accelerator for Efficient DNN Processing. - Francisco Muñoz-Martínez; Raveesh Garg; Michael Pellauer; José L. Abellán; Manuel E. Acacio; Tushar Krishna (ASPLOS (3), 2023)

GME: GPU-based Microarchitectural Extensions to Accelerate Homomorphic Encryption. - Kaustubh Shivdikar; Yuhui Bao; Rashmi Agrawal 001; Michael Tian Shen; Gilbert Jonatan; Evelio Mora; Alexander Ingare; Neal Livesay; José L. Abellán; John Kim 001; Ajay Joshi; David R. Kaeli (MICRO, 2023)

Accelerating Finite Field Arithmetic for Homomorphic Encryption on GPUs. - Neal Livesay; Gilbert Jonatan; Evelio Mora; Kaustubh Shivdikar; Rashmi Agrawal 001; Ajay Joshi; José L. Abellán; John Kim 001; David R. Kaeli (IEEE Micro, 2023)

Puppeteer: A Random Forest Based Manager for Hardware Prefetchers Across the Memory Hierarchy. - Furkan Eris; Marcia S. Louis; Kubra Eris; José Luis Abellán Miguel; Ajay Joshi (ACM Trans. Archit. Code Optim., 2023)

STIFT: A Spatio-Temporal Integrated Folding Tree for Efficient Reductions in Flexible DNN Accelerators. - Francisco Muñoz-Martínez; José L. Abellán; Manuel E. Acacio; Tushar Krishna (ACM J. Emerg. Technol. Comput. Syst., 2023)

AXI4MLIR: User-Driven Automatic Host Code Generation for Custom AXI-Based Accelerators. - Nicolas Bohm Agostini; Jude Haris; Perry Gibson; Malith Jayaweera; Norm Rubin; Antonino Tumeo; José L. Abellán; José Cano 001; David R. Kaeli (CGO, 2024)

NeuraChip: Accelerating GNN Computations with a Hash-based Decoupled Spatial Accelerator. - Kaustubh Shivdikar; Nicolas Bohm Agostini; Malith Jayaweera; Gilbert Jonatan; José L. Abellán; Ajay Joshi; John Kim 001; David R. Kaeli (ISCA, 2024)

Scalability Limitations of Processing-in-Memory using Real System Evaluations. - Gilbert Jonatan; Haeyoon Cho 002; Hyojun Son; Xiangyu Wu; Neal Livesay; Evelio Mora; Kaustubh Shivdikar; José L. Abellán; Ajay Joshi; David R. Kaeli; John Kim 001 (Proc. ACM Meas. Anal. Comput. Syst., 2024)

ACTA: Automatic Configuration of the Tensor Memory Accelerator for High-End GPUs. - Nicolás Meseguer; Yifan Sun 002; Michael Pellauer; José L. Abellán; Manuel E. Acacio (GPGPU@PPoPP, 2025)

PIMnet: A Domain-Specific Network for Efficient Collective Communication in Scalable PIM. - Hyojun Son; Gilbert Jonatan; Xiangyu Wu; Haeyoon Cho 002; Kaustubh Shivdikar; José L. Abellán; Ajay Joshi; David R. Kaeli; John Kim 001 (HPCA, 2025)

FIDESlib: A Fully-Fledged Open-Source FHE Library for Efficient CKKS on GPUs. - Carlos Agulló-Domingo; Óscar Vera-López; Seyda Guzelhan; Lohit Daksha; Aymane El Jerari; Kaustubh Shivdikar; Rashmi S. Agrawal 001; David R. Kaeli; Ajay Joshi; José L. Abellán (ISPASS, 2025)

Saffe: Multimodal Model Composition with Semantic-Alignment Fusion of Frozen Encoders. - Maithri Kulasekara; Juan F. Inglés-Romero; Baldomero Imbernón; José L. Abellán (J. Supercomput., 2025)