José Luis González

Affiliations:
  • CEA-Leti, Grenoble
  • Polytechnic University of Catalonia


According to our database1, José Luis González authored at least 29 papers between 2001 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Minimum Signal-To-Noise Ratio For High Classification Radar Accuracy.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

2017
Industry Perspectives.
IEEE Wirel. Commun., 2017

2015
A 45GHz/55GHz LO frequency selector for E-band transceivers based on switchable injection locked-oscillators in BiCMOS 55nm.
Proceedings of the ESSCIRC Conference 2015, 2015

2014
Electro-thermal characterization of a differential temperature sensor in a 65 nm CMOS IC: Applications to gain monitoring in RF amplifiers.
Microelectron. J., 2014

Millimeter-wave access and backhauling: the solution to the exponential data traffic increase in 5G mobile communications systems?
IEEE Commun. Mag., 2014

Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes.
Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014

2013
Inductor shielding strategies to protect mmW LC-VCOs from high frequency substrate noise.
Microelectron. J., 2013

2012
On the electrical properties of slotted metallic planes in CMOS processes for RF and millimeter-wave applications.
Microelectron. J., 2012

Electro-thermal coupling analysis methodology for RF circuits.
Microelectron. J., 2012

Design of a fully integrated CMOS self-testable RF power amplifier using a thermal sensor.
Proceedings of the 38th European Solid-State Circuit conference, 2012

2010
A comparison between grounded and floating shield inductors for mmW VCOs.
Proceedings of the 36th European Solid-State Circuits Conference, 2010

Behavioural Modelling of DLLs for Fast Simulation and Optimisation of Jitter and Power Consumption.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
Experimental analysis of substrate isolation techniques for RF-SOC integration.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

2008
A low-power RF front-end for 2.5 GHz receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Interactive presentation: Behavioral modeling of delay-locked loops and its application to jitter optimization in ultra wide-band impulse radio systems.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Observation of high-frequency analog/RF electrical circuit characteristics by on-chip thermal measurements.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
An investigation on the relation between digital circuitry characteristics and power supply noise spectrum in mixed-signal CMOS integrated circuits.
Microelectron. J., 2005

Asynchronous pulse logic cell for threshold logic and Boolean networks.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Characterization and noise analysis of a 12-bit current steering digital-to-analog converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Discrete and continuous substrate noise spectrum dependence on digital circuit characteristics.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Phase noise degradation of LC-tank VCOs due to substrate noise and package coupling.
Proceedings of the 31st European Solid-State Circuits Conference, 2005

2004
Mismatch and dynamic modeling of current sources in current-steering CMOS D/A converters: an extended design procedure.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

A physical-based noise macromodel for fast simulation of switching noise generation.
Microelectron. J., 2004

Increasing the capacity of RAID5 by online gradual assimilation.
Proceedings of the International Workshop on Storage Network Architecture and Parallel I/Os, 2004

A Macromodelling Methodology for Efficient High-Level Simulation of Substrate Noise Generation.
Proceedings of the 2004 Design, 2004

2003
Improved current-source sizing for high-speed high-accuracy current steering D/A converters.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Improved Design Methodology for High-Speed High-Accuracy Current Steering D/A Converters.
Proceedings of the 2003 Design, 2003

2002
Noise Generation and Coupling Mechanisms in Deep-Submicron ICs.
IEEE Des. Test Comput., 2002

2001
Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog converters.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001


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