On Input and Next-State Equations of the R-S Type M-Stable. - José I. Acha; José L. Huertas (IEEE Trans. Computers, 1976)

Self-Synchronization of Asynchronous Sequential Circutis Employing a General Clock Function. - José L. Huertas; José I. Acha (IEEE Trans. Computers, 1976)

Theory and design of multivalued memory elements. - José Luis Huertas; José I. Acha; G. Sanchez Gomez (MVL, 1978)

On the synthesis of multivalued circuits using principally binary elements. - José Luis Huertas; José I. Acha; L. Macias (MVL, 1978)

Chaos from switched-capacitor circuits: Discrete maps. - Ángel Rodríguez-Vázquez; José L. Huertas; Adoración Rueda; Belén Pérez-Verdú; Leon O. Chua (Proc. IEEE, 1987)

A new method for the efficient state-assignment of PLA-based sequential machines. - José L. Huertas; José M. Quintana (ICCAD, 1988)

A new nonlinear time-domain op-amp macromodel using threshold functions and digitally controlled network elements. - Belén Pérez-Verdú; José L. Huertas; Ángel Rodríguez-Vázquez (IEEE J. Solid State Circuits, 1988)

A new method for the state reduction of incompletely specified finite sequential machines. - Maria J. Avedillo; José M. Quintana; José Luis Huertas (EURO-DAC, 1990)

Analysis and design of self-limiting single-OP-AMPRC oscillators. - José L. Huertas; Belén Pérez-Verdú; Ángel Rodríguez-Vázquez (Int. J. Circuit Theory Appl., 1990)

CMOS Continuous BAM With On Chip Learning. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José Luis Huertas (IWANN, 1991)

CMOS OTA-C high-frequency sinusoidal oscillators. - Bernabé Linares-Barranco; Ángel Rodríguez-Vázquez; Edgar Sánchez-Sinencio; José L. Huertas (IEEE J. Solid State Circuits, 1991)

A CMOS implementation of FitzHugh-Nagumo neuron model. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José L. Huertas (IEEE J. Solid State Circuits, 1991)

Accuate simplification of large symbolic formulae. - Francisco V. Fernández 001; Ángel Rodríguez-Vázquez; J. D. Martín; José L. Huertas (ICCAD, 1992)

On-line testing of switched-capacitor filters. - José Luis Huertas; Diego Vázquez; Adoración Rueda (VTS, 1992)

Testability in analogue cellular neural networks. - Adoración Rueda; José L. Huertas (Int. J. Circuit Theory Appl., 1992)

A modular T-mode design approach for analog neural network hardware implementations. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José L. Huertas (IEEE J. Solid State Circuits, 1992)

Analog neural programmable optimizers in CMOS VLSI technologies. - Rafael Domínguez-Castro; Ángel Rodríguez-Vázquez; José Luis Huertas; Edgar Sánchez-Sinencio (IEEE J. Solid State Circuits, 1992)

Modeling of real bistables in VHDL. - Antonio J. Acosta 001; Angel Barriga; Manuel Valencia-Barrero; Manuel J. Bellido; José L. Huertas (EURO-DAC, 1993)

Easily Testable PLA-based FSMS. - Maria J. Avedillo; José M. Quintana; José L. Huertas (ISCAS, 1993)

A New Faster Method for Calculating the Resolution Coefficient of CMOS Latches: Design of an Optimum Latch. - Manuel J. Bellido; Manuel Valencia-Barrero; Antonio J. Acosta 001; Angel Barriga; José Luis Huertas; Rafael Domínguez-Castro (ISCAS, 1993)

A Model for VLSI Implementation of CNN Image Processing Chips Using Current-mode Techniques. - Servando Espejo-Meana; Ángel Rodríguez-Vázquez; Rafael Domínguez-Castro; Bernabé Linares-Barranco; José Luis Huertas (ISCAS, 1993)

A Tool for Automated Design of Sigma-Delta Modulators Using Statistical Optimization. - Fernando Medeiro; Maria Belen Pérez-Verdú; Ángel Rodríguez-Vázquez; José L. Huertas (ISCAS, 1993)

Improving the testability of switched-capacitor filters. - José Luis Huertas; Adoración Rueda; Diego Vázquez (J. Electron. Test., 1993)

A CMOS analog adaptive BAM with on-chip learning and weight refreshing. - Bernabé Linares-Barranco; Edgar Sánchez-Sinencio; Ángel Rodríguez-Vázquez; José L. Huertas (IEEE Trans. Neural Networks, 1993)

Testable switched-capacitor filters. - José L. Huertas; Adoración Rueda; Diego Vázquez (IEEE J. Solid State Circuits, 1993)

Modeling OpAmp-Induced Harmonic Distorition for Switched-Capacitor Sigma-Delta Modulator Design. - Fernando Medeiro; Maria Belen Pérez-Verdú; Ángel Rodríguez-Vázquez; José L. Huertas (ISCAS, 1994)

An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits. - Juan A. Prieto; José M. Quintana; Adoración Rueda; José L. Huertas (ISCAS, 1994)

A Low-Cost Strategy for Testing Analog Filters. - Diego Vázquez; Adoración Rueda; José L. Huertas (ISCAS, 1994)

A Study of the Sensitivity of Switched-Current Wave Analog Filters to Mismatching and Clock-Feedthrough Errors. - Alberto Yufera; Adoración Rueda; José L. Huertas (ISCAS, 1994)

A Real Time Clustering CMOS Neural Engine. - Teresa Serrano-Gotarredona; Bernabé Linares-Barranco; José Luis Huertas (NIPS, 1994)

A new strategy for testing analog filters. - Diego Vázquez; Adoración Rueda; José Luis Huertas (VTS, 1994)

Programmable switched-current wave analog filters. - Alberto Yúfera; Adoración Rueda; José L. Huertas (IEEE J. Solid State Circuits, 1994)

Optimum PLA folding through boolean satisfiability. - José M. Quintana; Maria J. Avedillo; Maria P. Parra; José L. Huertas (ASP-DAC, 1995)

New CMOS VLSI linear self-timed architectures. - Antonio J. Acosta 001; Manuel J. Bellido; Manuel Valencia-Barrero; Angel Barriga; Raúl Jiménez; José L. Huertas (ASYNC, 1995)

Statistical behavioral modeling and characterization of A/D converters. - Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (ICCAD, 1995)

A Tool for Fast Mismatch Analysis of Analog Circuits. - R. Rodriguez-Macias; Francisco V. Fernández 001; Ángel Rodríguez-Vázquez; José L. Huertas (ISCAS, 1995)

A solution for the on-line test of analog ladder filters. - Diego Vázquez; Adoración Rueda; José L. Huertas (VTS, 1995)

Constrained state assignment of easily testable FSMs. - Maria J. Avedillo; José M. Quintana; José Luis Huertas (J. Electron. Test., 1995)

Modular Asynchronous Arbiter Insensitive to Metastability. - Manuel Valencia-Barrero; Manuel J. Bellido; José L. Huertas; Antonio J. Acosta 001; Santiago Sánchez-Solano (IEEE Trans. Computers, 1995)

SODS: a new CMOS differential-type structure. - Antonio J. Acosta 001; Manuel Valencia 001; Angel Barriga; Manuel J. Bellido; José L. Huertas (IEEE J. Solid State Circuits, 1995)

A vertically integrated tool for automated design of ΣΔ modulators. - Fernando Medeiro; Belén Pérez-Verdú; Ángel Rodríguez-Vázquez; José L. Huertas (IEEE J. Solid State Circuits, 1995)

Reducing the impact of DFT on the performance of analog integrated circuits: improved sw-op amp design. - Diego Vázquez; José L. Huertas; Adoración Rueda (VTS, 1996)

Integrated circuit implementation of fuzzy controllers. - José L. Huertas; Santiago Sánchez-Solano; Iluminada Baturone; Angel Barriga (IEEE J. Solid State Circuits, 1996)

SWITTEST: Automatic Switch-Level Fault Simulation and Test Evaluation of Switched-Capacitor Systems. - Salvador Mir; Adoración Rueda; Thomas Olbrich; Eduardo J. Peralías; José Luis Huertas (DAC, 1997)

A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs. - Juan A. Prieto; Adoración Rueda; José M. Quintana; José Luis Huertas (ED&TC, 1997)

Analog and Mixed-Signal Benchmark Circuits-First Release. - Bozena Kaminska; Karim Arabi; I. Bell; José L. Huertas; Bruce C. Kim; Adoración Rueda; Mani Soma; Prashant Goteti (ITC, 1997)

A DFT Technique for Analog-to-Digital Converters with digital correction. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (VTS, 1997)

Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits. - Iluminada Baturone; Santiago Sánchez-Solano; Angel Barriga; José Luis Huertas (IEEE Trans. Fuzzy Syst., 1997)

A Dynamic Model for the State Assignment Problem. - Manuel Martínez; Maria J. Avedillo; José M. Quintana; José L. Huertas (DATE, 1998)

Switch-Level Fault Coverage Analysis for Switched-Capacitor Systems. - Salvador Mir; Adoración Rueda; Diego Vázquez; José Luis Huertas (DATE, 1998)

An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits. - Juan A. Prieto; Adoración Rueda; Ian Andrew Grout; Eduardo J. Peralías; José L. Huertas; Andrew Mark David Richardson (DATE, 1998)

CMOS pipelined A/D converters with concurrent error detection capability. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (ICECS, 1998)

DfT and on-line test of high-performance data converters: a practical case. - Eduardo J. Peralías; Adoración Rueda; Juan A. Prieto; José L. Huertas (ITC, 1998)

A high-Q bandpass fully differential SC filter with enhanced testability. - Diego Vázquez; Adoración Rueda; José Luis Huertas; Eduardo J. Peralías (IEEE J. Solid State Circuits, 1998)

An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length. - Manuel Martínez; Maria J. Avedillo; José M. Quintana; José L. Huertas (DATE, 1999)

Effective oscillation-based test for application to a DTMF filter bank. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (ITC, 1999)

Self-Timed Boundary-Scan Cells for Multi-Chip Module Test. - T. A. García; Antonio J. Acosta 001; J. M. Mora; J. Ramos; José Luis Huertas (J. Electron. Test., 1999)

Mixed-Signal SoC Testing: Is Mixed-Signal Design-for-Test on Its Way. - Chin-Long Wey; Adam Osseiran; José Luis Huertas; Yeon-Chen Nieu (Asian Test Symposium, 2000)

A Vhdl-Based Methodology for Design and Verification of Pipeline A/D Converters. - Eduardo J. Peralías; Antonio J. Acosta 001; Adoración Rueda; José L. Huertas (DATE, 2000)

VHDL-based behavioural description of pipeline ADCs. - Eduardo J. Peralías; Antonio J. Acosta 001; Adoración Rueda; José L. Huertas (ISCAS, 2000)

Alternative DFT Strategies for High-Speed Pipelined Data Converters. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (LATW, 2000)

Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (VLSI Design, 2000)

Structural testing of pipelined analog to digital converters. - Eduardo J. Peralías; Adoración Rueda; José L. Huertas (ISCAS (1), 2001)

Self-Testable Pipelined ADC with Low Hardware Overhead. - Eduardo J. Peralías; Gloria Huertas; Adoración Rueda; José L. Huertas (VTS, 2001)

New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters. - Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (J. Electron. Test., 2001)

Efficient Realization of a Threshold Voter for Self-Purging Redundancy. - José M. Quintana; Maria J. Avedillo; José Luis Huertas (J. Electron. Test., 2001)

Practical Oscillation-Based Test in Analog Integrated Filters: Experimental Results. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (DELTA, 2002)

Simplified Reed-Muller expressions for residue threshold functions. - José M. Quintana; Maria J. Avedillo; José L. Huertas (ISCAS (4), 2002)

Practical solutions for the application of the oscillation-based-test in analog integrated circuits. - Diego Vázquez; Gloria Huertas; Gildas Léger; Adoración Rueda; José L. Huertas (ISCAS (1), 2002)

Low-cost on-chip measurements for Oscillation-Based-Test in Analog Integrated Circuits. - Diego Vázquez; Gloria Huertas; Adoración Rueda; Gildas Léger; José L. Huertas (LATW, 2002)

Practical Solutions for the Application of the Oscillation-Based-Test: Start-Up and On-Chip Evaluation. - Diego Vázquez; Gloria Huertas; Gildas Léger; Adoración Rueda; José L. Huertas (VTS, 2002)

Practical Oscillation-Based Test of Integrated Filters. - Gloria Huertas; Diego Vázquez; Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (IEEE Des. Test Comput., 2002)

Testing Mixed-Signal Cores: A Practical Oscillation-Based Test in an Analog Macrocell. - Gloria Huertas; Diego Vázquez; Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (IEEE Des. Test Comput., 2002)

COPAS: A New Algorithm for the Partial Input Encoding Problem. - Manuel Martínez; Maria José Avedillo; José M. Quintana; José Luis Huertas (VLSI Design, 2002)

Sub-1-V CMOS proportional-to-absolute temperature references. - Francisco Serra-Graells; José Luis Huertas (IEEE J. Solid State Circuits, 2003)

Oscillation-based test in bandpass oversampled A/D converters. - Gloria Huertas; Diego Vázquez; Adoración Rueda; José L. Huertas (Microelectron. J., 2003)

A Method for Parameter Extraction of Analog Sine-Wave Signals for Mixed-Signal Built-In-Self-Test Applications. - Diego Vázquez; Gildas Léger; Gloria Huertas; Adoración Rueda; José L. Huertas (DATE, 2004)

Test and Design-for-Test of Mixed-Signal Integrated Circuits. - Marcelo Lubaszewski; José Luis Huertas (IFIP Congress Tutorials, 2004)

Test and design-for-test of mixed-signal integrated circuits. - José Luis Huertas (SBCCI, 2004)

A true-1-V 300-μW CMOS-subthreshold log-domain hearing-aid-on-chip. - Francisco Serra-Graells; Lluís Gómez; José Luis Huertas (IEEE J. Solid State Circuits, 2004)

Impact of random channel mismatch on the SNR and SFDR of time-interleaved ADCs. - Gildas Léger; Eduardo J. Peralías; Adoración Rueda; José Luis Huertas (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Robust frequency divider based on resonant tunneling devices. - Maria J. Avedillo; José M. Quintana; José L. Huertas (ISCAS (3), 2005)

Guest Editorial. - Adoración Rueda; Michel Renovell; José Luis Huertas (J. Electron. Test., 2005)

Sine-Wave Signal Characterization Using Square-Wave and SigmaDelta-Modulation: Application to Mixed-Signal BIST. - Diego Vázquez; Gloria Huertas; África Luque; Manuel J. Barragan Asian; Gildas Léger; Adoración Rueda; José Luis Huertas (J. Electron. Test., 2005)

Low-Voltage CMOS subthreshold log-domain filtering. - Francisco Serra-Graells; José Luis Huertas (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Total ionizing dose effects in switched-capacitor filters using oscillation-based test. - John M. Espinosa-Duran; Jaime Velasco-Medina; Gloria Huertas; José Luis Huertas (SBCCI, 2007)

Oscillation-Based Test in Data Converters: On-Line Monitoring. - Gloria Huertas; José Luis Huertas (DELTA, 2008)

A 2.4GHz LNA in a 90-nm CMOS technology designed with ACM model. - Rafaella Fiorelli; Fernando Silveira; Eduardo J. Peralías; Diego Vázquez; Adoración Rueda; José Luis Huertas (SBCCI, 2008)

A BIST Solution for the Functional Characterization of RF Systems Based on Envelope Response Analysis. - Manuel J. Barragan Asian; Rafaella Fiorelli; Diego Vázquez; Adoración Rueda; José Luis Huertas (Asian Test Symposium, 2009)

(Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. - Manuel J. Barragan Asian; Gloria Huertas; Adoración Rueda; José Luis Huertas (DELTA, 2010)

Low-cost signature test of RF blocks based on envelope response analysis. - Manuel J. Barragan Asian; Rafaella Fiorelli; Diego Vázquez; Adoración Rueda; José Luis Huertas (ETS, 2010)

Improving the Accuracy of RF Alternate Test Using Multi-VDD Conditions: Application to Envelope-Based Test of LNAs. - Manuel J. Barragan Asian; Rafaella Fiorelli; Gildas Léger; Adoración Rueda; José L. Huertas (Asian Test Symposium, 2011)

Alternate Test of LNAs Through Ensemble Learning of On-Chip Digital Envelope Signatures. - Manuel J. Barragan Asian; Rafaella Fiorelli; Gildas Léger; Adoración Rueda; José L. Huertas (J. Electron. Test., 2011)

OBT for settling error test of sampled-data systems using signal-dependent clocking. - Manuel J. Barragan Asian; Gildas Léger; José L. Huertas (ETS, 2012)

Multi-condition alternate test of analog, mixed-signal, and RF systems. - Manuel J. Barragan Asian; Gildas Léger; José Luis Huertas (LATW, 2012)

From voltage oscillations to tissue-impedance measurements. - Andrés Maldonado; Pablo Pérez; Gloria Huertas; Alberto Yufera; Adoración Rueda; José L. Huertas (BioCAS, 2015)

The Bio-Oscillator: A Circuit for Cell-Culture Assays. - Gloria Huertas; Andrés Maldonado; Alberto Yufera; Adoración Rueda; José Luis Huertas (IEEE Trans. Circuits Syst. II Express Briefs, 2015)

Cell-culture measurements using voltage oscillations. - Andrés Maldonado; Gloria Huertas; Adoración Rueda; José Luis Huertas; Pablo Pérez; Alberto Yufera (LASCAS, 2016)