Performance measurements of a concurrent production system architecture without global synchronization. - José N. Amaral 001; Joydeep Ghosh (IPPS, 1995)

Designing genetic algorithms for the state assignment problem. - José Nelson Amaral; Kagan Tumer; Joydeep Ghosh (IEEE Trans. Syst. Man Cybern., 1995)

A Concurrent Architecture for Serializable Production Systems. - José N. Amaral 001; Joydeep Ghosh (IEEE Trans. Parallel Distributed Syst., 1996)

Invariant pattern recognition of 2D images using neural networks and frequency-domain representation. - Fernando César Comparsi de Castro; José Nelson Amaral; Paulo Roberto Girardello Franco (ICNN, 1997)

Coping with very High Latencies in Petaflop Computer Systems. - Sean Ryan; José Nelson Amaral; Guang R. Gao; Zachary Ruiz; Andrés Márquez 001; Kevin B. Theobald (ISHPC, 1999)

Automatic compiler techniques for thread coarsening for multithreaded architectures. - Gary M. Zoppetti; Gagan Agrawal; Lori L. Pollock; José Nelson Amaral; Xinan Tang; Guang R. Gao (ICS, 2000)

Caching Single-Assignment Structures to Build a Robust Fine-Grain Multi-Threading System. - Wen-Yen Lin; Jean-Luc Gaudiot; José Nelson Amaral; Guang R. Gao (IPDPS, 2000)

Design and Implementation of an Efficient Thread Partitioning Algorithm. - José Nelson Amaral; Guang R. Gao; Erturk Dogan Kocalar; Patrick O'Neill; Xinan Tang (ISHPC, 2000)

Speculative Prefetching of Induction Pointers. - Artour Stoutchinin; José Nelson Amaral; Guang R. Gao; James C. Dehnert; Suneel Jain; Alban Douillet (CC, 2001)

Minimum Register Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs. - Ramaswamy Govindarajan; Hongbo Yang; Chihong Zhang; José Nelson Amaral; Guang R. Gao (IPDPS, 2001)

Exploiting Locality in Single Assignment Data Structures Updated Through Split-Phase Transactions. - José Nelson Amaral; Wen-Yen Lin; Jean-Luc Gaudiot; Guang R. Gao (Clust. Comput., 2001)

An Abstract State Machine Specification and Verification of the Location Consistency Memory Model and Cache Protocol. - Charles Wallace 001; Guy Tremblay; José Nelson Amaral (J. Univers. Comput. Sci., 2001)

Dynamic Load Balancers for a Multithreaded Multiprocessor System. - Prasad Kakulavarapu; Olivier Maquelin; José Nelson Amaral; Guang R. Gao (Parallel Process. Lett., 2001)

Removing Impediments to Loop Fusion Through Code Transformations. - Bob Blainey; Christopher Barton; José Nelson Amaral (LCPC, 2002)

Fine-Grain Stacked Register Allocation for the Itanium Architecture. - Alban Douillet; José Nelson Amaral; Guang R. Gao (LCPC, 2002)

On the Tamability of the Location Consistency Memory Model. - Charles Wallace 001; Guy Tremblay; José Nelson Amaral (PDPTA, 2002)

Should potential loop optimizations influence inlining decisions? - Christopher Barton; José Nelson Amaral; Bob Blainey (CASCON, 2003)

The Bank Nth Chance Replacement Policy for FPGA-Based CAMs. - Paul Berube; Ashley Zinyk; José Nelson Amaral; Mike H. MacGregor (FPL, 2003)

Crafting Data Structures: A Study of Reference Locality in Refinement-Based Pathfinding. - Robert Niewiadomski; José Nelson Amaral; Robert C. Holte (HiPC, 2003)

To Inline or Not to Inline? Enhanced Inlining Decisions. - Peng Zhao; José Nelson Amaral (LCPC, 2003)

Implementation of the EARTH programming model on SMP clusters: a multi-threaded language and runtime system. - Guy Tremblay; C. J. Morrone; José Nelson Amaral; Guang R. Gao (Concurr. Comput. Pract. Exp., 2003)

Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures. - Ramaswamy Govindarajan; Hongbo Yang; José Nelson Amaral; Chihong Zhang; Guang R. Gao (IEEE Trans. Computers, 2003)

Identifying opportunities for automatic remote field cloning. - Christopher Barton; Peng Zhao; Robert Niewiadomski; José Nelson Amaral (CASCON, 2004)

An FPGA prototype for the experimental evaluation of a multizone network cache. - Paul Berube; José Nelson Amaral; Mike H. MacGregor (FPGA, 2004)

A performance study of data layout techniques for improving data locality in refinement-based pathfinding. - Robert Niewiadomski; José Nelson Amaral; Robert C. Holte (ACM J. Exp. Algorithmics, 2004)

FPGA implementation and experimental evaluation of a multizone network cache. - Paul Berube; Mike H. MacGregor; José Nelson Amaral (Microprocess. Microsystems, 2004)

Generalized Index-Set Splitting. - Christopher Barton; Arie Tal; Bob Blainey; José Nelson Amaral (CC, 2005)

Feedback-Directed Switch-Case Statement Optimization. - Peng Zhao; José Nelson Amaral (ICPP Workshops, 2005)

A hardware-based longest prefix matching scheme for TCAMs. - Soraya Kasnavi; Vincent C. Gaudet; Paul Berube; José N. Amaral 001 (ISCAS (4), 2005)

A Multizone Pipelined Cache for IP Routing. - Soraya Kasnavi; Paul Berube; Vincent C. Gaudet; José Nelson Amaral (NETWORKING, 2005)

Function Outlining and Partial Inlining. - Peng Zhao; José Nelson Amaral (SBAC-PAD, 2005)

Teaching digital design to computing science students in a single academic term. - José Nelson Amaral; Paul Berube; Paras Mehta (IEEE Trans. Educ., 2005)

Sequential and Parallel Algorithms for Frontier A* with Delayed Duplicate Detection. - Robert Niewiadomski; José Nelson Amaral; Robert C. Holte (AAAI, 2006)

Utilizing field usage patterns for Java heap space optimization. - Zhuang Guo; José Nelson Amaral; Duane Szafron; Yang Wang 006 (CASCON, 2006)

A Parallel External-Memory Frontier Breadth-First Traversal Algorithm for Clusters of Workstations. - Robert Niewiadomski; José Nelson Amaral; Robert C. Holte (ICPP, 2006)

Aestimo: a feedback-directed optimization evaluation tool. - Paul Berube; José Nelson Amaral (ISPASS, 2006)

Tree-Traversal Orientation Analysis. - Kevin Andrusky; Stephen Curial; José Nelson Amaral (LCPC, 2006)

A Characterization of Shared Data Access Patterns in UPC Programs. - Christopher Barton; Calin Cascaval; José Nelson Amaral (LCPC, 2006)

Shared memory programming for large scale machines. - Christopher Barton; Calin Cascaval; George Almási 001; Yili Zheng; Montse Farreras; Siddhartha Chatterjee; José Nelson Amaral (PLDI, 2006)

Eliminating Redundant Join-Set Computations in Static Single Assignment. - Angela French; José Nelson Amaral (J. Univers. Comput. Sci., 2006)

Is MPI suitable for a generative design-pattern system? - Paras Mehta; José Nelson Amaral; Duane Szafron (Parallel Comput., 2006)

A Dimension Abstraction Approach to Vectorization in Matlab. - Neil Birkbeck; Jonathan Levesque; José Nelson Amaral (CGO, 2007)

Evaluation of Offset Assignment Heuristics. - Johnny Huynh; José Nelson Amaral; Paul Berube; Sid Ahmed Ali Touati (HiPEAC, 2007)

Multidimensional Blocking in UPC. - Christopher Barton; Calin Cascaval; George Almási 001; Rahul Garg 001; José Nelson Amaral; Montse Farreras (LCPC, 2007)

Using ZBDDs in Points-to Analysis. - Ondrej Lhoták; Stephen Curial; José Nelson Amaral (LCPC, 2007)

Using SIMD registers and instructions to enable instruction-level parallelism in sorting algorithms. - Timothy Furtak; José Nelson Amaral; Robert Niewiadomski (SPAA, 2007)

Ablego: a function outlining and partial inlining framework. - Peng Zhao; José Nelson Amaral (Softw. Pract. Exp., 2007)

Forma: A framework for safe automatic array reshaping. - Peng Zhao; Shimin Cui; Yaoqing Gao; Raúl Silvera; José Nelson Amaral (ACM Trans. Program. Lang. Syst., 2007)

Topic 9: Parallel and Distributed Programming. - José Nelson Amaral; Joaquim Gabarró (Euro-Par, 2008)

The MAP3S Static-and-Regular Mesh Simulation and Wavefront Parallel-Programming Patterns. - Robert Niewiadomski; José Nelson Amaral; Duane Szafron (ICPP, 2008)

MPADS: memory-pooling-assisted data splitting. - Stephen Curial; Peng Zhao; José Nelson Amaral; Yaoqing Gao; Shimin Cui; Raúl Silvera; Roch Archambault (ISMM, 2008)

A cache-based internet protocol address lookup architecture. - Soraya Kasnavi; Paul Berube; Vincent C. Gaudet; José Nelson Amaral (Comput. Networks, 2008)

Workload Reduction for Multi-input Feedback-Directed Optimization. - Paul Berube; José Nelson Amaral; Rayson Ho; Raúl Silvera (CGO, 2009)

Using XBDDs and ZBDDs in points-to analysis. - Ondrej Lhoták; Stephen Curial; José Nelson Amaral (Softw. Pract. Exp., 2009)

Compiling Python to a hybrid execution environment. - Rahul Garg 003; José Nelson Amaral (GPGPU, 2010)

Mining Opportunities for Code Improvement in a Just-In-Time Compiler. - Adam Jocksch; Marcel Mitran; Joran Siu; Nikola Grcevski; José Nelson Amaral (CC, 2010)

Mining for Paths in Flow Graphs. - Adam Jocksch; José Nelson Amaral; Marcel Mitran (ICDM, 2010)

Using Support Vector Machines to Learn How to Compile a Method. - Ricardo Nabinger Sanchez; José Nelson Amaral; Duane Szafron; Marius Pirvu; Mark G. Stoodley (SBAC-PAD, 2010)

An Optimal Encoding to Represent a Single Set in an ROBDD. - Ondrej Lhoták; Stephen Curial; José Nelson Amaral (IEEE Trans. Computers, 2010)

10th Workshop on Compiler-Driven Performance. - Clark Verbrugge; José Nelson Amaral; Mark G. Stoodley; David Grove; Kit Barton (CASCON, 2011)

Using machines to learn method-specific compilation strategies. - Ricardo Nabinger Sanchez; José Nelson Amaral; Duane Szafron; Marius Pirvu; Mark G. Stoodley (CGO, 2011)

Combined profiling: practical collection of feedback information for code optimization. - Paul Berube; Adam Preuss; José Nelson Amaral (ICPE, 2011)

Evaluating address register assignment and offset assignment algorithms. - Johnny Huynh; José Nelson Amaral; Paul Berube; Sid Ahmed Ali Touati (ACM Trans. Embed. Comput. Syst., 2011)

Transactional event profiling in a best-effort hardware transactional memory system. - Matthew Gaudet; José Nelson Amaral (PACT, 2012)

Evaluation of blue Gene/Q hardware support for transactional memories. - Amy Wang; Matthew Gaudet; Peng Wu 001; José Nelson Amaral; Martin Ohmacht; Christopher Barton; Raúl Silvera; Maged M. Michael (PACT, 2012)

11th Compiler-Driven Performance Workshop. - Ondrej Lhoták; José Nelson Amaral; Kit Barton; Martin Hirzel; J. Gregory Steffan (CASCON, 2012)

Combined profiling: A methodology to capture varied program behavior across multiple inputs. - Paul Berube; José Nelson Amaral (ISPASS, 2012)

12th Compiler-Driven Performance Workshop. - José Nelson Amaral; Bob Blainey; Laurie J. Hendren; Kevin Stoodley; Frank Tip (CASCON, 2013)

Automatic speculative parallelization of loops using polyhedral dependence analysis. - Arnamoy Bhattacharyya; José Nelson Amaral (COSMIC@CGO, 2013)

On the Merits of Distributed Work-Stealing on Selective Locality-Aware Tasks. - Jeeva Paudel; Olivier Tardieu; José Nelson Amaral (ICPP, 2013)

Improving communication in PGAS environments: static and dynamic coalescing in UPC. - Michail Alvanos; Montse Farreras; Ettore Tiotto; José Nelson Amaral; Xavier Martorell (ICS, 2013)

Improving performance of all-to-all communication through loop scheduling in PGAS environments. - Michail Alvanos; Gabriel Tanase; Montse Farreras; Ettore Tiotto; José Nelson Amaral; Xavier Martorell (ICS, 2013)

Hybrid parallel task placement in X10. - Jeeva Paudel; Olivier Tardieu; José Nelson Amaral (X10@PLDI, 2013)

Stratified sampling for even workload partitioning. - Jeeva Paudel; José Nelson Amaral (PACT, 2014)

Optimizing shared data accesses in distributed-memory X10 systems. - Jeeva Paudel; Olivier Tardieu; José Nelson Amaral (HiPC, 2014)

Heavyweight Pattern Mining in Attributed Flow Graphs. - Carolina Simoes Gomes; José Nelson Amaral; Jörg Sander 001; Joran Siu; Li Ding (ICDM, 2014)

Measuring Effective Work to Reward Success in Dynamic Transaction Scheduling. - Márcio Machado Pereira; José Nelson Amaral; Guido Araujo (ICPP, 2014)

Syntax errors just aren't natural: improving error reporting with language models. - Joshua Charles Campbell; Abram Hindle; José Nelson Amaral (MSR, 2014)

Reducing Compiler-Inserted Instrumentation in Unified-Parallel-C Code Generation. - Michail Alvanos; José Nelson Amaral; Ettore Tiotto; Montse Farreras; Xavier Martorell (SBAC-PAD, 2014)

Multi-dimensional Evaluation of Haswell's Transactional Memory Performance. - Márcio Machado Pereira; Matthew Gaudet; José Nelson Amaral; Guido Araujo (SBAC-PAD, 2014)

A special issue from the international conference on performance engineering 2013. - José N. Amaral 001; A. J. Field (Concurr. Comput. Pract. Exp., 2014)

Data-dependence profiling to enable safe thread level speculation. - Arnamoy Bhattacharyya; José Nelson Amaral; Hal Finkel (CASCON, 2015)

Stratified sampling for even workload partitioning applied to single source shortest path algorithm. - Jeeva Paudel; Levi H. S. Lelis; José Nelson Amaral (CASCON, 2015)

Stratified Sampling for Even Workload Partitioning Applied to IDA* and Delaunay Algorithms. - Jeeva Paudel; Levi H. S. Lelis; José Nelson Amaral (IPDPS, 2015)

Serialization Management for Best-Effort Hardware Transactional Memory. - Matthew Gaudet; Guido Araujo; José Nelson Amaral (SBAC-PAD, 2015)

Using Hardware Transactional Memory to Enable Speculative Trace Optimization. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (SBAC-PAD (Workshops), 2015)

In defense of soundiness: a manifesto. - Benjamin Livshits; Manu Sridharan; Yannis Smaragdakis; Ondrej Lhoták; José Nelson Amaral; Bor-Yuh Evan Chang; Samuel Z. Guyer; Uday P. Khedker; Anders Møller; Dimitrios Vardoulakis (Commun. ACM, 2015)

Guest Editorial: SBAC-PAD 2013. - Guido Araujo; Jean-Luc Gaudiot; Manish Parashar; Derek Chiou; José Nelson Amaral; Chita R. Das (Int. J. Parallel Program., 2015)

Hybrid parallel task placement in irregular applications. - Jeeva Paudel; José Nelson Amaral (J. Parallel Distributed Comput., 2015)

Error location in Python: where the mutants hide. - Joshua Charles Campbell; Abram Hindle; José N. Amaral 001 (PeerJ Prepr., 2015)

Software Support and Evaluation of Hardware Transactional Memory on Blue Gene/Q. - Amy Wang; Matthew Gaudet; Peng Wu 001; Martin Ohmacht; José Nelson Amaral; Christopher Barton; Raúl Silvera; Maged M. Michael (IEEE Trans. Computers, 2015)

Evaluating and Improving Thread-Level Speculation in Hardware Transactional Memories. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (IPDPS, 2016)

Using shared-data localization to reduce the cost of inspector-execution in unified-parallel-C programs. - Michail Alvanos; Ettore Tiotto; José Nelson Amaral; Montse Farreras; Xavier Martorell (Parallel Comput., 2016)

Study of hardware transactional memory characteristics and serialization policies on Haswell. - Márcio Machado Pereira; Matthew Gaudet; José Nelson Amaral; Guido Araujo (Parallel Comput., 2016)

SafeType: detecting type violations for type-basedalias analysis of C. - Iain Ireland; José Nelson Amaral; Raúl Silvera; Shimin Cui (Softw. Pract. Exp., 2016)

The Truth, The Whole Truth, and Nothing But the Truth: A Pragmatic Guide to Assessing Empirical Evaluations. - Stephen M. Blackburn; Amer Diwan; Matthias Hauswirth; Peter F. Sweeney; José Nelson Amaral; Tim Brecht; Lubomír Bulej; Cliff Click; Lieven Eeckhout; Sebastian Fischmeister; Daniel Frampton; Laurie J. Hendren; et al. (ACM Trans. Program. Lang. Syst., 2016)

Combining Static and Dynamic Data Coalescing in Unified Parallel C. - Michail Alvanos; Montse Farreras; Ettore Tiotto; José Nelson Amaral; Xavier Martorell (IEEE Trans. Parallel Distributed Syst., 2016)

Performance Evaluation of Thread-Level Speculation in Off-the-Shelf Hardware Transactional Memories. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (Euro-Par, 2017)

Finding and correcting syntax errors using recurrent neural networks. - Eddie A. Santos; Joshua Charles Campbell; Abram Hindle; José Nelson Amaral (PeerJ Prepr., 2017)

Run-Length Base-Delta Encoding for High-Speed Compression. - Taylor Lloyd; Kit Barton; Ettore Tiotto; José Nelson Amaral (ICPP Workshops, 2018)

The Alberta Workloads for the SPEC CPU 2017 Benchmark Suite. - José Nelson Amaral; Edson Borin; Dylan R. Ashley; Caian Benedicto; Elliot Colp; Joao Henrique Stange Hoffmam; Marcus Karpoff; Erick Ochoa; Morgan Redshaw; Raphael Ernani Rodrigues (ISPASS, 2018)

Automated GPU Grid Geometry Selection for OPENMP Kernels. - Taylor Lloyd; Artem Chikin; Sanket Kedia; Dhruv Jain; José Nelson Amaral (SBAC-PAD, 2018)

OpenMP Code Offloading: Splitting GPU Kernels, Pipelining Communication and Computation, and Selecting Better Grid Geometries. - Artem Chikin; Tyler Gobran; José Nelson Amaral (WACCPD@SC, 2018)

Syntax and sensibility: Using language models to detect and correct syntax errors. - Eddie Antonio Santos; Joshua Charles Campbell; Dhvani Patel; Abram Hindle; José Nelson Amaral (SANER, 2018)

Using Hardware-Transactional-Memory Support to Implement Thread-Level Speculation. - Juan Salamanca 001; José Nelson Amaral; Guido Araujo (IEEE Trans. Parallel Distributed Syst., 2018)

Compiler-driven performance workshop. - Clark Verbrugge; José Nelson Amaral; Reid Copeland; Whitney T. Tsang (CASCON, 2019)

Toward an Analytical Performance Model to Select between GPU and CPU Execution. - Artem Chikin; José Nelson Amaral; Karim Ali 001; Ettore Tiotto (IPDPS Workshops, 2019)

Efficient and Precise Dynamic Construction of Control Flow Graphs. - Andrei Rimsa; José Nelson Amaral; Fernando Magno Quintão Pereira (SBLP, 2019)

Memory-access-aware Safety and Profitability Analysis for Transformation of Accelerator-bound OpenMP Loops. - Artem Chikin; Taylor Lloyd; José Nelson Amaral; Ettore Tiotto; Muhammad Usman (ACM Trans. Archit. Code Optim., 2019)

PSU: A Framework for Dynamic Software Updates in Multi-threaded C-Language Programs. - Marcus Karpoff; José Nelson Amaral; Kai-Ting Amy Wang; Rayson Ho; Brice Dobry (SBAC-PAD, 2020)

Flexibility Is Key in Organizing a Global Professional Conference Online: The ICPE 2020 Experience in the COVID-19 Era. - Alexandru Iosup; Catia Trubiani; Anne Koziolek; José Nelson Amaral; Andre B. Bondi; Andreas Brunnert (CoRR, 2020)

U can't inline this! - Erick Ochoa; Cijie Xia; Karim Ali 001; Andrew Craik; José Nelson Amaral (CASCON, 2021)

Vulkan Vision: Ray Tracing Workload Characterization using Automatic Graphics Instrumentation. - David Pankratz; Tyler Nowicki; Ahmed Eltantawy; José Nelson Amaral (CGO, 2021)

Pooling Acceleration in the DaVinci Architecture Using Im2col and Col2im Instructions. - Caio S. Rohwedder; João P. L. de Carvalho; José Nelson Amaral; Guido Araújo; Giancarlo Colmenares; Kai-Ting Amy Wang (IPDPS Workshops, 2021)

Practical dynamic reconstruction of control flow graphs. - Andrei Rimsa; José Nelson Amaral; Fernando M. Q. Pereira (Softw. Pract. Exp., 2021)

KernelFaRer: Replacing Native-Code Idioms with High-Performance Library Calls. - João P. L. de Carvalho; Braedy Kuzma; Ivan Korostelev; José Nelson Amaral; Christopher Barton; José E. Moreira; Guido Araujo (ACM Trans. Archit. Code Optim., 2021)

Methodological Principles for Reproducible Performance Evaluation in Cloud Computing. - Alessandro Vittorio Papadopoulos; Laurens Versluis; André Bauer 001; Nikolas Herbst; Jóakim von Kistowski; Ahmed Ali-Eldin; Cristina L. Abad; José Nelson Amaral; Petr Tuma 001; Alexandru Iosup (IEEE Trans. Software Eng., 2021)

Instruction visibility in SPEC CPU2017. - Andrei Rimsa Álvares; José Nelson Amaral; Fernando Magno Quintão Pereira (J. Comput. Lang., 2021)

Improving Convolution via Cache Hierarchy Tiling and Reduced Packing. - Victor Ferrari; Rafael C. F. Sousa; Márcio Machado Pereira; João P. L. de Carvalho; José Nelson Amaral; Guido Araujo (PACT, 2022)

19th Compiler-Driven PerformanceWorkshop. - José Nelson Amaral; Kit Barton (CASCON, 2022)

Compiling for the IBM Matrix Engine for Enterprise Workloads. - João P. L. de Carvalho; José E. Moreira; José Nelson Amaral (IEEE Micro, 2022)

Vectorizing divergent control flow with active-lane consolidation on long-vector architectures. - Wyatt Praharenka; David Pankratz; João P. L. de Carvalho; Ehsan Amiri; José Nelson Amaral (J. Supercomput., 2022)

Stub Folding: Retaining Type Specialization to Increase the Efficiency of Highly Polymorphic Inline Caches. - Nathan Henderson; Iain Ireland; Matthew Gaudet; João P. L. de Carvalho; José Nelson Amaral (CASCON, 2023)

Efficient Auto-Vectorization for Control-flow Dependent Loops through Data Permutation. - Rouzbeh Paktinatkeleshteri; João P. L. de Carvalho; Ehsan Amiri; José Nelson Amaral (CASCON, 2023)

To Pack or Not to Pack: A Generalized Packing Analysis and Transformation. - Caio Salvador Rohwedder; Nathan Henderson; João P. L. de Carvalho; Yufei Chen; José Nelson Amaral (CGO, 2023)

CacheIR: The Benefits of a Structured Representation for Inline Caches. - Jan de Mooij; Matthew Gaudet; Iain Ireland; Nathan Henderson; José Nelson Amaral (MPLR, 2023)

YaConv: Convolution with Low Cache Footprint. - Ivan Korostelev; Joao P. L. de Carvalho; José E. Moreira; José Nelson Amaral (ACM Trans. Archit. Code Optim., 2023)

Fast matrix multiplication via compiler-only layered data reorganization and intrinsic lowering. - Braedy Kuzma; Ivan Korostelev; João P. L. de Carvalho; José E. Moreira; Christopher Barton; Guido Araujo; José Nelson Amaral (Softw. Pract. Exp., 2023)

Advancing Direct Convolution Using Convolution Slicing Optimization and ISA Extensions. - Victor Ferrari; Rafael Cardoso Fernandes Sousa; Márcio Machado Pereira; Joao P. L. de Carvalho; José Nelson Amaral; José E. Moreira; Guido Araujo (ACM Trans. Archit. Code Optim., 2023)

Region-Based Data Layout via Data Reuse Analysis. - Caio Salvador Rohwedder; João P. L. de Carvalho; José Nelson Amaral (CC, 2024)

Effective Communication of Scientific Results. - José Nelson Amaral (CoRR, 2024)

Scalar Interpolation: A Better Balance between Vector and Scalar Execution for SuperScalar Architectures. - Reza Ghanbari; Henry Kao; João P. L. de Carvalho; Ehsan Amiri; José Nelson Amaral (CGO, 2025)